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Side by Side Diff: src/compiler/ppc/instruction-selector-ppc.cc

Issue 2122853002: Implement UnaligedLoad and UnaligedStore turbofan operators. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Nits. Fixes some errors Created 4 years, 5 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/adapters.h" 5 #include "src/base/adapters.h"
6 #include "src/compiler/instruction-selector-impl.h" 6 #include "src/compiler/instruction-selector-impl.h"
7 #include "src/compiler/node-matchers.h" 7 #include "src/compiler/node-matchers.h"
8 #include "src/compiler/node-properties.h" 8 #include "src/compiler/node-properties.h"
9 #include "src/ppc/frames-ppc.h" 9 #include "src/ppc/frames-ppc.h"
10 10
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320 } else if (g.CanBeImmediate(base, mode)) { 320 } else if (g.CanBeImmediate(base, mode)) {
321 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(), 321 Emit(opcode | AddressingModeField::encode(kMode_MRI), g.NoOutput(),
322 g.UseRegister(offset), g.UseImmediate(base), g.UseRegister(value)); 322 g.UseRegister(offset), g.UseImmediate(base), g.UseRegister(value));
323 } else { 323 } else {
324 Emit(opcode | AddressingModeField::encode(kMode_MRR), g.NoOutput(), 324 Emit(opcode | AddressingModeField::encode(kMode_MRR), g.NoOutput(),
325 g.UseRegister(base), g.UseRegister(offset), g.UseRegister(value)); 325 g.UseRegister(base), g.UseRegister(offset), g.UseRegister(value));
326 } 326 }
327 } 327 }
328 } 328 }
329 329
330 // Architecture supports unaligned access, therefore VisitLoad is used instead
331 void InstructionSelector::VisitUnalignedLoad(Node* node) { UNREACHABLE(); }
332
333 // Architecture supports unaligned access, therefore VisitStore is used instead
334 void InstructionSelector::VisitUnalignedStore(Node* node) { UNREACHABLE(); }
330 335
331 void InstructionSelector::VisitCheckedLoad(Node* node) { 336 void InstructionSelector::VisitCheckedLoad(Node* node) {
332 CheckedLoadRepresentation load_rep = CheckedLoadRepresentationOf(node->op()); 337 CheckedLoadRepresentation load_rep = CheckedLoadRepresentationOf(node->op());
333 PPCOperandGenerator g(this); 338 PPCOperandGenerator g(this);
334 Node* const base = node->InputAt(0); 339 Node* const base = node->InputAt(0);
335 Node* const offset = node->InputAt(1); 340 Node* const offset = node->InputAt(1);
336 Node* const length = node->InputAt(2); 341 Node* const length = node->InputAt(2);
337 ArchOpcode opcode = kArchNop; 342 ArchOpcode opcode = kArchNop;
338 switch (load_rep.representation()) { 343 switch (load_rep.representation()) {
339 case MachineRepresentation::kWord8: 344 case MachineRepresentation::kWord8:
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2063 // static 2068 // static
2064 MachineOperatorBuilder::AlignmentRequirements 2069 MachineOperatorBuilder::AlignmentRequirements
2065 InstructionSelector::AlignmentRequirements() { 2070 InstructionSelector::AlignmentRequirements() {
2066 return MachineOperatorBuilder::AlignmentRequirements:: 2071 return MachineOperatorBuilder::AlignmentRequirements::
2067 FullUnalignedAccessSupport(); 2072 FullUnalignedAccessSupport();
2068 } 2073 }
2069 2074
2070 } // namespace compiler 2075 } // namespace compiler
2071 } // namespace internal 2076 } // namespace internal
2072 } // namespace v8 2077 } // namespace v8
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