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| 1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
| 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
| 7 | 7 |
| 8 namespace v8 { | 8 namespace v8 { |
| 9 namespace internal { | 9 namespace internal { |
| 10 namespace compiler { | 10 namespace compiler { |
| (...skipping 79 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 90 V(MipsTruncUwD) \ | 90 V(MipsTruncUwD) \ |
| 91 V(MipsTruncUwS) \ | 91 V(MipsTruncUwS) \ |
| 92 V(MipsCvtDW) \ | 92 V(MipsCvtDW) \ |
| 93 V(MipsCvtDUw) \ | 93 V(MipsCvtDUw) \ |
| 94 V(MipsCvtSW) \ | 94 V(MipsCvtSW) \ |
| 95 V(MipsCvtSUw) \ | 95 V(MipsCvtSUw) \ |
| 96 V(MipsLb) \ | 96 V(MipsLb) \ |
| 97 V(MipsLbu) \ | 97 V(MipsLbu) \ |
| 98 V(MipsSb) \ | 98 V(MipsSb) \ |
| 99 V(MipsLh) \ | 99 V(MipsLh) \ |
| 100 V(MipsUlh) \ |
| 100 V(MipsLhu) \ | 101 V(MipsLhu) \ |
| 102 V(MipsUlhu) \ |
| 101 V(MipsSh) \ | 103 V(MipsSh) \ |
| 104 V(MipsUsh) \ |
| 102 V(MipsLw) \ | 105 V(MipsLw) \ |
| 106 V(MipsUlw) \ |
| 103 V(MipsSw) \ | 107 V(MipsSw) \ |
| 108 V(MipsUsw) \ |
| 104 V(MipsLwc1) \ | 109 V(MipsLwc1) \ |
| 110 V(MipsUlwc1) \ |
| 105 V(MipsSwc1) \ | 111 V(MipsSwc1) \ |
| 112 V(MipsUswc1) \ |
| 106 V(MipsLdc1) \ | 113 V(MipsLdc1) \ |
| 114 V(MipsUldc1) \ |
| 107 V(MipsSdc1) \ | 115 V(MipsSdc1) \ |
| 116 V(MipsUsdc1) \ |
| 108 V(MipsFloat64ExtractLowWord32) \ | 117 V(MipsFloat64ExtractLowWord32) \ |
| 109 V(MipsFloat64ExtractHighWord32) \ | 118 V(MipsFloat64ExtractHighWord32) \ |
| 110 V(MipsFloat64InsertLowWord32) \ | 119 V(MipsFloat64InsertLowWord32) \ |
| 111 V(MipsFloat64InsertHighWord32) \ | 120 V(MipsFloat64InsertHighWord32) \ |
| 112 V(MipsFloat64SilenceNaN) \ | 121 V(MipsFloat64SilenceNaN) \ |
| 113 V(MipsFloat64Max) \ | 122 V(MipsFloat64Max) \ |
| 114 V(MipsFloat64Min) \ | 123 V(MipsFloat64Min) \ |
| 115 V(MipsPush) \ | 124 V(MipsPush) \ |
| 116 V(MipsStoreToStackSlot) \ | 125 V(MipsStoreToStackSlot) \ |
| 117 V(MipsStackClaim) | 126 V(MipsStackClaim) |
| (...skipping 15 matching lines...) Expand all Loading... |
| 133 #define TARGET_ADDRESSING_MODE_LIST(V) \ | 142 #define TARGET_ADDRESSING_MODE_LIST(V) \ |
| 134 V(MRI) /* [%r0 + K] */ \ | 143 V(MRI) /* [%r0 + K] */ \ |
| 135 V(MRR) /* [%r0 + %r1] */ | 144 V(MRR) /* [%r0 + %r1] */ |
| 136 | 145 |
| 137 | 146 |
| 138 } // namespace compiler | 147 } // namespace compiler |
| 139 } // namespace internal | 148 } // namespace internal |
| 140 } // namespace v8 | 149 } // namespace v8 |
| 141 | 150 |
| 142 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 151 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
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