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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
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89 V(MipsTruncUwD) \ | 89 V(MipsTruncUwD) \ |
90 V(MipsTruncUwS) \ | 90 V(MipsTruncUwS) \ |
91 V(MipsCvtDW) \ | 91 V(MipsCvtDW) \ |
92 V(MipsCvtDUw) \ | 92 V(MipsCvtDUw) \ |
93 V(MipsCvtSW) \ | 93 V(MipsCvtSW) \ |
94 V(MipsCvtSUw) \ | 94 V(MipsCvtSUw) \ |
95 V(MipsLb) \ | 95 V(MipsLb) \ |
96 V(MipsLbu) \ | 96 V(MipsLbu) \ |
97 V(MipsSb) \ | 97 V(MipsSb) \ |
98 V(MipsLh) \ | 98 V(MipsLh) \ |
| 99 V(MipsUlh) \ |
99 V(MipsLhu) \ | 100 V(MipsLhu) \ |
| 101 V(MipsUlhu) \ |
100 V(MipsSh) \ | 102 V(MipsSh) \ |
| 103 V(MipsUsh) \ |
101 V(MipsLw) \ | 104 V(MipsLw) \ |
| 105 V(MipsUlw) \ |
102 V(MipsSw) \ | 106 V(MipsSw) \ |
| 107 V(MipsUsw) \ |
103 V(MipsLwc1) \ | 108 V(MipsLwc1) \ |
| 109 V(MipsUlwc1) \ |
104 V(MipsSwc1) \ | 110 V(MipsSwc1) \ |
| 111 V(MipsUswc1) \ |
105 V(MipsLdc1) \ | 112 V(MipsLdc1) \ |
| 113 V(MipsUldc1) \ |
106 V(MipsSdc1) \ | 114 V(MipsSdc1) \ |
| 115 V(MipsUsdc1) \ |
107 V(MipsFloat64ExtractLowWord32) \ | 116 V(MipsFloat64ExtractLowWord32) \ |
108 V(MipsFloat64ExtractHighWord32) \ | 117 V(MipsFloat64ExtractHighWord32) \ |
109 V(MipsFloat64InsertLowWord32) \ | 118 V(MipsFloat64InsertLowWord32) \ |
110 V(MipsFloat64InsertHighWord32) \ | 119 V(MipsFloat64InsertHighWord32) \ |
111 V(MipsFloat64SilenceNaN) \ | 120 V(MipsFloat64SilenceNaN) \ |
112 V(MipsFloat64Max) \ | 121 V(MipsFloat64Max) \ |
113 V(MipsFloat64Min) \ | 122 V(MipsFloat64Min) \ |
114 V(MipsFloat32Max) \ | 123 V(MipsFloat32Max) \ |
115 V(MipsFloat32Min) \ | 124 V(MipsFloat32Min) \ |
116 V(MipsPush) \ | 125 V(MipsPush) \ |
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134 #define TARGET_ADDRESSING_MODE_LIST(V) \ | 143 #define TARGET_ADDRESSING_MODE_LIST(V) \ |
135 V(MRI) /* [%r0 + K] */ \ | 144 V(MRI) /* [%r0 + K] */ \ |
136 V(MRR) /* [%r0 + %r1] */ | 145 V(MRR) /* [%r0 + %r1] */ |
137 | 146 |
138 | 147 |
139 } // namespace compiler | 148 } // namespace compiler |
140 } // namespace internal | 149 } // namespace internal |
141 } // namespace v8 | 150 } // namespace v8 |
142 | 151 |
143 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 152 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
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