| Index: runtime/vm/flow_graph_allocator.cc
|
| diff --git a/runtime/vm/flow_graph_allocator.cc b/runtime/vm/flow_graph_allocator.cc
|
| index 009e500bb88e655a793046269450829bf7a62c01..558e6f7d06c35fbdb7e3c034af96194f827a357d 100644
|
| --- a/runtime/vm/flow_graph_allocator.cc
|
| +++ b/runtime/vm/flow_graph_allocator.cc
|
| @@ -749,15 +749,22 @@ static Location::Kind RegisterKindFromPolicy(Location loc) {
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|
|
|
|
| static Location::Kind RegisterKindForResult(Instruction* instr) {
|
| - if ((instr->representation() == kUnboxedDouble) ||
|
| - (instr->representation() == kUnboxedFloat32x4) ||
|
| - (instr->representation() == kUnboxedInt32x4) ||
|
| - (instr->representation() == kUnboxedFloat64x2) ||
|
| - (instr->representation() == kPairOfUnboxedDouble)) {
|
| + const Representation rep = instr->representation();
|
| +#if !defined(TARGET_ARCH_DBC)
|
| + if ((rep == kUnboxedDouble) || (rep == kUnboxedFloat32x4) ||
|
| + (rep == kUnboxedInt32x4) || (rep == kUnboxedFloat64x2) ||
|
| + (rep == kPairOfUnboxedDouble)) {
|
| return Location::kFpuRegister;
|
| } else {
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| return Location::kRegister;
|
| }
|
| +#else
|
| + // DBC supports only unboxed doubles and does not have distinguished FPU
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| + // registers.
|
| + ASSERT((rep != kUnboxedFloat32x4) && (rep != kUnboxedInt32x4) &&
|
| + (rep != kUnboxedFloat64x2) && (rep != kPairOfUnboxedDouble));
|
| + return Location::kRegister;
|
| +#endif
|
| }
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|
|
|
|
| @@ -3055,6 +3062,11 @@ void FlowGraphAllocator::AllocateRegisters() {
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| unallocated_xmm_,
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| fpu_regs_,
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| blocked_fpu_registers_);
|
| +#if defined(TARGET_ARCH_DBC)
|
| + // For DBC all registers should have been allocated in the first pass.
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| + ASSERT(unallocated_.is_empty());
|
| +#endif
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| +
|
| AllocateUnallocatedRanges();
|
| #if defined(TARGET_ARCH_DBC)
|
| const intptr_t last_used_fpu_register = last_used_register_;
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|
|