DBC: Enables unboxed doubles

runtime/vm/constants_dbc.h

Index: runtime/vm/constants_dbc.h
diff --git a/runtime/vm/constants_dbc.h b/runtime/vm/constants_dbc.h
index a15058d4e207bc23bd26886e6b6ea43c00f0c118..fa137842f17eb6deecd97f77982352ae105857cc 100644
--- a/runtime/vm/constants_dbc.h
+++ b/runtime/vm/constants_dbc.h
@@ -183,11 +183,19 @@ namespace dart {
 //    the immediately following instruction is skipped. These instructions
 //    expect their operands to be Smis, but don't check that they are.
 //
+//  - DAdd, DSub, DMul, DDiv rA, rB, rC
+//
+//    Arithmetic operaions on unboxed doubles. FP[rA] <- FP[rB] op FP[rC].
+//
 //  - Neg rA , rD
 //
 //    FP[rA] <- -FP[rD]. Assumes FP[rD] is a Smi. If there is no overflow the
 //    immediately following instruction is skipped.
 //
+//  - DNeg rA, rD
+//
+//    FP[rA] <- -FP[rD]. Assumes FP[rD] is an unboxed double.
+//
 //  - BitOr, BitAnd, BitXor rA, rB, rC
 //
 //    FP[rA] <- FP[rB] op FP[rC]. These instructions expect their operands to be
@@ -197,6 +205,24 @@ namespace dart {
 //
 //    FP[rA] <- ~FP[rD]. As above, assumes FP[rD] is a Smi.
 //
+//  - BoxDouble rA, rD
+//
+//    Box the double in FP[rD] with the result in FP[rA].
+//
+//  - UnboxDouble rA, rD
+//
+//    Unbox the double in FP[rD] into FP[rA]. Assumes FP[rD] is a double.
+//
+//  - CheckedUnboxDouble rA, rD
+//
+//    Unboxes FP[rD] into FP[rA] and skips the following instruction unless

[Vyacheslav Egorov (Google), 2016/07/14 16:26:24]

I guess the next instruction is always a deoptimization which means instead of
actually embedding deoptimization into the bytecode we could make
CheckUnboxDouble instruction itself deoptimize.

[zra, 2016/07/14 21:12:10]

For now I'd prefer to follow the pattern we have going with the other places we
can deopt.

+//    FP[rD] is not a double or a Smi. When FP[rD] is a Smi, converts it to a
+//    double.
+//
+//  - SmiToDouble rA, rD
+//
+//    Convert the Smi in FP[rD] to an unboxed double in FP[rA].
+//
 //  - StoreStaticT`OS D
 //
 //    Stores TOS into the static field PP[D].
@@ -230,9 +256,10 @@ namespace dart {
 //
 //  - If<Cond> rA, rD
 //
-//    Cond is Le, Lt, Ge, Gt, or unsigned variants ULe, ULt, UGe, UGt.
+//    Cond is Le, Lt, Ge, Gt, unsigned variants ULe, ULt, UGe, UGt, and
+//    unboxed double variants DEq, DNe, DLe, DLt, DGe, DGt.
 //    Skips the next instruction unless FP[rA] <Cond> FP[rD]. Assumes that
-//    FP[rA] and FP[rD] are Smis.
+//    FP[rA] and FP[rD] are Smis or unboxed doubles as inidcated by <Cond>.
 //
 //  - CreateArrayTOS
 //
@@ -400,7 +427,7 @@ namespace dart {
 //
 //  - CheckClassId rA, D
 //
-//    If the object at FP[rA]'s class id matches the class id D, then skip the
+//    If the class id in FP[rA] matches the class id D, then skip the
 //    following instruction.
 //
 //  - CheckDenseSwitch rA, D
@@ -526,6 +553,15 @@ namespace dart {
   V(BitAnd,                      A_B_C, reg, reg, reg) \
   V(BitXor,                      A_B_C, reg, reg, reg) \
   V(BitNot,                        A_D, reg, reg, ___) \
+  V(BoxDouble,                     A_D, reg, reg, ___) \
+  V(UnboxDouble,                   A_D, reg, reg, ___) \
+  V(CheckedUnboxDouble,            A_D, reg, reg, ___) \
+  V(SmiToDouble,                   A_D, reg, reg, ___) \
+  V(DAdd,                        A_B_C, reg, reg, reg) \
+  V(DSub,                        A_B_C, reg, reg, reg) \
+  V(DMul,                        A_B_C, reg, reg, reg) \
+  V(DDiv,                        A_B_C, reg, reg, reg) \
+  V(DNeg,                          A_D, reg, reg, ___) \
   V(StoreStaticTOS,                  D, lit, ___, ___) \
   V(PushStatic,                      D, lit, ___, ___) \
   V(InitStaticTOS,                   0, ___, ___, ___) \
@@ -543,6 +579,12 @@ namespace dart {
   V(IfULt,                         A_D, reg, reg, ___) \
   V(IfUGe,                         A_D, reg, reg, ___) \
   V(IfUGt,                         A_D, reg, reg, ___) \
+  V(IfDNe,                         A_D, reg, reg, ___) \
+  V(IfDEq,                         A_D, reg, reg, ___) \
+  V(IfDLe,                         A_D, reg, reg, ___) \
+  V(IfDLt,                         A_D, reg, reg, ___) \
+  V(IfDGe,                         A_D, reg, reg, ___) \
+  V(IfDGt,                         A_D, reg, reg, ___) \
   V(IfNeStrictNum,                 A_D, reg, reg, ___) \
   V(IfEqStrictNum,                 A_D, reg, reg, ___) \
   V(IfEqNull,                        A, reg, ___, ___) \