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| 1 # Copyright 2015 The Chromium Authors. All rights reserved. | 1 # Copyright 2015 The Chromium Authors. All rights reserved. |
| 2 # Use of this source code is governed by a BSD-style license that can be | 2 # Use of this source code is governed by a BSD-style license that can be |
| 3 # found in the LICENSE file. | 3 # found in the LICENSE file. |
| 4 | 4 |
| 5 import("//build/config/v8_target_cpu.gni") | |
| 6 | |
| 7 # These are primarily relevant in current_cpu == "mips*" contexts, where | 5 # These are primarily relevant in current_cpu == "mips*" contexts, where |
| 8 # MIPS code is being compiled. But they can also be relevant in the | 6 # MIPS code is being compiled. But they can also be relevant in the |
| 9 # other contexts when the code will change its behavior based on the | 7 # other contexts when the code will change its behavior based on the |
| 10 # cpu it wants to generate code for. | 8 # cpu it wants to generate code for. |
| 11 if (current_cpu == "mipsel" || v8_target_cpu == "mipsel") { | 9 if (current_cpu == "mipsel" || v8_current_cpu == "mipsel") { |
| 12 declare_args() { | 10 declare_args() { |
| 13 # MIPS arch variant. Possible values are: | 11 # MIPS arch variant. Possible values are: |
| 14 # "r1" | 12 # "r1" |
| 15 # "r2" | 13 # "r2" |
| 16 # "r6" | 14 # "r6" |
| 17 mips_arch_variant = "r1" | 15 mips_arch_variant = "r1" |
| 18 | 16 |
| 19 # MIPS DSP ASE revision. Possible values are: | 17 # MIPS DSP ASE revision. Possible values are: |
| 20 # 0: unavailable | 18 # 0: unavailable |
| 21 # 1: revision 1 | 19 # 1: revision 1 |
| 22 # 2: revision 2 | 20 # 2: revision 2 |
| 23 mips_dsp_rev = 0 | 21 mips_dsp_rev = 0 |
| 24 | 22 |
| 25 # MIPS floating-point ABI. Possible values are: | 23 # MIPS floating-point ABI. Possible values are: |
| 26 # "hard": sets the GCC -mhard-float option. | 24 # "hard": sets the GCC -mhard-float option. |
| 27 # "soft": sets the GCC -msoft-float option. | 25 # "soft": sets the GCC -msoft-float option. |
| 28 mips_float_abi = "hard" | 26 mips_float_abi = "hard" |
| 29 | 27 |
| 30 # MIPS32 floating-point register width. Possible values are: | 28 # MIPS32 floating-point register width. Possible values are: |
| 31 # "fp32": sets the GCC -mfp32 option. | 29 # "fp32": sets the GCC -mfp32 option. |
| 32 # "fp64": sets the GCC -mfp64 option. | 30 # "fp64": sets the GCC -mfp64 option. |
| 33 # "fpxx": sets the GCC -mfpxx option. | 31 # "fpxx": sets the GCC -mfpxx option. |
| 34 mips_fpu_mode = "fp32" | 32 mips_fpu_mode = "fp32" |
| 35 } | 33 } |
| 36 } else if (current_cpu == "mips64el" || v8_target_cpu == "mips64el") { | 34 } else if (current_cpu == "mips64el" || v8_current_cpu == "mips64el") { |
| 37 # MIPS arch variant. Possible values are: | 35 # MIPS arch variant. Possible values are: |
| 38 # "r2" | 36 # "r2" |
| 39 # "r6" | 37 # "r6" |
| 40 if (current_os == "android" || target_os == "android") { | 38 if (current_os == "android" || target_os == "android") { |
| 41 declare_args() { | 39 declare_args() { |
| 42 mips_arch_variant = "r6" | 40 mips_arch_variant = "r6" |
| 43 } | 41 } |
| 44 } else { | 42 } else { |
| 45 declare_args() { | 43 declare_args() { |
| 46 mips_arch_variant = "r2" | 44 mips_arch_variant = "r2" |
| 47 } | 45 } |
| 48 } | 46 } |
| 49 } | 47 } |
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