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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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256 (kNegOffset & kImm16Mask); // NOLINT | 256 (kNegOffset & kImm16Mask); // NOLINT |
257 | 257 |
258 const Instr kSwRegFpNegOffsetPattern = SW | (Register::kCode_fp << kRsShift) | | 258 const Instr kSwRegFpNegOffsetPattern = SW | (Register::kCode_fp << kRsShift) | |
259 (kNegOffset & kImm16Mask); // NOLINT | 259 (kNegOffset & kImm16Mask); // NOLINT |
260 // A mask for the Rt register for push, pop, lw, sw instructions. | 260 // A mask for the Rt register for push, pop, lw, sw instructions. |
261 const Instr kRtMask = kRtFieldMask; | 261 const Instr kRtMask = kRtFieldMask; |
262 const Instr kLwSwInstrTypeMask = 0xffe00000; | 262 const Instr kLwSwInstrTypeMask = 0xffe00000; |
263 const Instr kLwSwInstrArgumentMask = ~kLwSwInstrTypeMask; | 263 const Instr kLwSwInstrArgumentMask = ~kLwSwInstrTypeMask; |
264 const Instr kLwSwOffsetMask = kImm16Mask; | 264 const Instr kLwSwOffsetMask = kImm16Mask; |
265 | 265 |
266 | |
267 Assembler::Assembler(Isolate* isolate, void* buffer, int buffer_size) | 266 Assembler::Assembler(Isolate* isolate, void* buffer, int buffer_size) |
268 : AssemblerBase(isolate, buffer, buffer_size), | 267 : AssemblerBase(isolate, buffer, buffer_size), |
269 recorded_ast_id_(TypeFeedbackId::None()), | 268 recorded_ast_id_(TypeFeedbackId::None()) { |
270 positions_recorder_(this) { | |
271 reloc_info_writer.Reposition(buffer_ + buffer_size_, pc_); | 269 reloc_info_writer.Reposition(buffer_ + buffer_size_, pc_); |
272 | 270 |
273 last_trampoline_pool_end_ = 0; | 271 last_trampoline_pool_end_ = 0; |
274 no_trampoline_pool_before_ = 0; | 272 no_trampoline_pool_before_ = 0; |
275 trampoline_pool_blocked_nesting_ = 0; | 273 trampoline_pool_blocked_nesting_ = 0; |
276 // We leave space (16 * kTrampolineSlotsSize) | 274 // We leave space (16 * kTrampolineSlotsSize) |
277 // for BlockTrampolinePoolScope buffer. | 275 // for BlockTrampolinePoolScope buffer. |
278 next_buffer_check_ = FLAG_force_long_branches | 276 next_buffer_check_ = FLAG_force_long_branches |
279 ? kMaxInt : kMaxBranchOffset - kTrampolineSlotsSize * 16; | 277 ? kMaxInt : kMaxBranchOffset - kTrampolineSlotsSize * 16; |
280 internal_trampoline_exception_ = false; | 278 internal_trampoline_exception_ = false; |
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3445 | 3443 |
3446 if (icache_flush_mode != SKIP_ICACHE_FLUSH) { | 3444 if (icache_flush_mode != SKIP_ICACHE_FLUSH) { |
3447 Assembler::FlushICache(isolate, pc, 4 * Assembler::kInstrSize); | 3445 Assembler::FlushICache(isolate, pc, 4 * Assembler::kInstrSize); |
3448 } | 3446 } |
3449 } | 3447 } |
3450 | 3448 |
3451 } // namespace internal | 3449 } // namespace internal |
3452 } // namespace v8 | 3450 } // namespace v8 |
3453 | 3451 |
3454 #endif // V8_TARGET_ARCH_MIPS64 | 3452 #endif // V8_TARGET_ARCH_MIPS64 |
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