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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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276 (kNegOffset & kImm16Mask); // NOLINT | 276 (kNegOffset & kImm16Mask); // NOLINT |
277 | 277 |
278 const Instr kSwRegFpNegOffsetPattern = SW | (Register::kCode_fp << kRsShift) | | 278 const Instr kSwRegFpNegOffsetPattern = SW | (Register::kCode_fp << kRsShift) | |
279 (kNegOffset & kImm16Mask); // NOLINT | 279 (kNegOffset & kImm16Mask); // NOLINT |
280 // A mask for the Rt register for push, pop, lw, sw instructions. | 280 // A mask for the Rt register for push, pop, lw, sw instructions. |
281 const Instr kRtMask = kRtFieldMask; | 281 const Instr kRtMask = kRtFieldMask; |
282 const Instr kLwSwInstrTypeMask = 0xffe00000; | 282 const Instr kLwSwInstrTypeMask = 0xffe00000; |
283 const Instr kLwSwInstrArgumentMask = ~kLwSwInstrTypeMask; | 283 const Instr kLwSwInstrArgumentMask = ~kLwSwInstrTypeMask; |
284 const Instr kLwSwOffsetMask = kImm16Mask; | 284 const Instr kLwSwOffsetMask = kImm16Mask; |
285 | 285 |
286 | |
287 Assembler::Assembler(Isolate* isolate, void* buffer, int buffer_size) | 286 Assembler::Assembler(Isolate* isolate, void* buffer, int buffer_size) |
288 : AssemblerBase(isolate, buffer, buffer_size), | 287 : AssemblerBase(isolate, buffer, buffer_size), |
289 recorded_ast_id_(TypeFeedbackId::None()), | 288 recorded_ast_id_(TypeFeedbackId::None()) { |
290 positions_recorder_(this) { | |
291 reloc_info_writer.Reposition(buffer_ + buffer_size_, pc_); | 289 reloc_info_writer.Reposition(buffer_ + buffer_size_, pc_); |
292 | 290 |
293 last_trampoline_pool_end_ = 0; | 291 last_trampoline_pool_end_ = 0; |
294 no_trampoline_pool_before_ = 0; | 292 no_trampoline_pool_before_ = 0; |
295 trampoline_pool_blocked_nesting_ = 0; | 293 trampoline_pool_blocked_nesting_ = 0; |
296 // We leave space (16 * kTrampolineSlotsSize) | 294 // We leave space (16 * kTrampolineSlotsSize) |
297 // for BlockTrampolinePoolScope buffer. | 295 // for BlockTrampolinePoolScope buffer. |
298 next_buffer_check_ = FLAG_force_long_branches | 296 next_buffer_check_ = FLAG_force_long_branches |
299 ? kMaxInt : kMaxBranchOffset - kTrampolineSlotsSize * 16; | 297 ? kMaxInt : kMaxBranchOffset - kTrampolineSlotsSize * 16; |
300 internal_trampoline_exception_ = false; | 298 internal_trampoline_exception_ = false; |
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3192 | 3190 |
3193 if (icache_flush_mode != SKIP_ICACHE_FLUSH) { | 3191 if (icache_flush_mode != SKIP_ICACHE_FLUSH) { |
3194 Assembler::FlushICache(isolate, pc, 2 * sizeof(int32_t)); | 3192 Assembler::FlushICache(isolate, pc, 2 * sizeof(int32_t)); |
3195 } | 3193 } |
3196 } | 3194 } |
3197 | 3195 |
3198 } // namespace internal | 3196 } // namespace internal |
3199 } // namespace v8 | 3197 } // namespace v8 |
3200 | 3198 |
3201 #endif // V8_TARGET_ARCH_MIPS | 3199 #endif // V8_TARGET_ARCH_MIPS |
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