Patch to enhance the source code line information for profiler.

src/ia32/lithium-codegen-ia32.cc

Index: src/ia32/lithium-codegen-ia32.cc
===================================================================
--- src/ia32/lithium-codegen-ia32.cc	(revision 16036)
+++ src/ia32/lithium-codegen-ia32.cc	(working copy)
@@ -335,6 +335,7 @@
 bool LCodeGen::GenerateBody() {
   ASSERT(is_generating());
   bool emit_instructions = true;
+

[danno, 2013/08/05 16:59:17]

nit: please remove extraneous whitespace change.

   for (current_instruction_ = 0;
        !is_aborted() && current_instruction_ < instructions_->length();
        current_instruction_++) {
@@ -355,6 +356,8 @@
 
     if (!CpuFeatures::IsSupported(SSE2)) FlushX87StackIfNecessary(instr);
 
+    RecordAndUpdatePosition(instr->position());
+
     instr->CompileToNative(this);
 
     if (!CpuFeatures::IsSupported(SSE2)) {
@@ -422,6 +425,10 @@
   if (deferred_.length() > 0) {
     for (int i = 0; !is_aborted() && i < deferred_.length(); i++) {
       LDeferredCode* code = deferred_[i];
+
+      int pos = instructions_->at(code->instruction_index())->position();
+      RecordAndUpdatePosition(pos);
+
       Comment(";;; <@%d,#%d> "
               "-------------------- Deferred %s --------------------",
               code->instruction_index(),
@@ -1168,6 +1175,14 @@
 }
 
 
+void LCodeGen::RecordAndUpdatePosition(int position) {

[danno, 2013/08/05 16:59:17]

Don't you need this in the ARM implementation, too? Does it actually compile/run
on ARM?

+  if (position >= 0 && position != old_position_) {
+    masm()->positions_recorder()->RecordPosition(position);
+    old_position_ = position;
+  }
+}
+
+
 static const char* LabelType(LLabel* label) {
   if (label->is_loop_header()) return " (loop header)";
   if (label->is_osr_entry()) return " (OSR entry)";