Optionally use 31-bits SMI value for 64-bit system

src/x64/code-stubs-x64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 705 matching lines @@
 static void BinaryOpStub_GenerateSmiCode(
     MacroAssembler* masm,
     Label* slow,
     BinaryOpStub::SmiCodeGenerateHeapNumberResults allow_heapnumber_results,
     Token::Value op) {
 
   // Arguments to BinaryOpStub are in rdx and rax.
   const Register left = rdx;
   const Register right = rax;
 
+#if !V8_USE_31_BITS_SMI_VALUE
   // We only generate heapnumber answers for overflowing calculations
   // for the four basic arithmetic operations and logical right shift by 0.
   bool generate_inline_heapnumber_results =
       (allow_heapnumber_results == BinaryOpStub::ALLOW_HEAPNUMBER_RESULTS) &&
       (op == Token::ADD || op == Token::SUB ||
        op == Token::MUL || op == Token::DIV || op == Token::SHR);
+#else
+  bool generate_inline_heapnumber_results =
+      (allow_heapnumber_results == BinaryOpStub::ALLOW_HEAPNUMBER_RESULTS) &&
+      (op == Token::ADD || op == Token::SUB || op == Token::SHL ||
+       op == Token::MUL || op == Token::DIV || op == Token::SHR);
+#endif
 
   // Smi check of both operands.  If op is BIT_OR, the check is delayed
   // until after the OR operation.
   Label not_smis;
   Label use_fp_on_smis;
   Label fail;
 
   if (op != Token::BIT_OR) {
     Comment smi_check_comment(masm, "-- Smi check arguments");
     __ JumpIfNotBothSmi(left, right, &not_smis);
@@ skipping 42 matching lines @@
       ASSERT(right.is(rax));
       __ SmiXor(right, right, left);  // BIT_XOR is commutative.
       break;
 
     case Token::BIT_AND:
       ASSERT(right.is(rax));
       __ SmiAnd(right, right, left);  // BIT_AND is commutative.
       break;
 
     case Token::SHL:
+#if !V8_USE_31_BITS_SMI_VALUE
       __ SmiShiftLeft(left, left, right);
+#else
+      __ push(left);
+      __ push(right);
+      __ SmiShiftLeft(left, left, right, &use_fp_on_smis);
+#endif
       __ movq(rax, left);
       break;
 
     case Token::SAR:
       __ SmiShiftArithmeticRight(left, left, right);
       __ movq(rax, left);
       break;
 
     case Token::SHR:
+#if V8_USE_31_BITS_SMI_VALUE
+      __ push(left);
+      __ push(right);
+#endif
       __ SmiShiftLogicalRight(left, left, right, &use_fp_on_smis);
       __ movq(rax, left);
       break;
 
     default:
       UNREACHABLE();
   }
 
   // 5. Emit return of result in rax.  Some operations have registers pushed.
+#ifdef V8_USE_31_BITS_SMI_VALUE
+  if (op == Token::SHL || op == Token::SHR) {
+    // drop arguments.
+    __ addq(rsp, Immediate(2 * kRegisterSize));
+  }
+#endif
   __ ret(0);
 
   if (use_fp_on_smis.is_linked()) {
     // 6. For some operations emit inline code to perform floating point
     //    operations on known smis (e.g., if the result of the operation
     //    overflowed the smi range).
     __ bind(&use_fp_on_smis);
     if (op == Token::DIV || op == Token::MOD) {
       // Restore left and right to rdx and rax.
       __ movq(rdx, rcx);
       __ movq(rax, rbx);
     }
 
     if (generate_inline_heapnumber_results) {
+#if !V8_USE_31_BITS_SMI_VALUE
       __ AllocateHeapNumber(rcx, rbx, slow);
       Comment perform_float(masm, "-- Perform float operation on smis");
       if (op == Token::SHR) {
         __ SmiToInteger32(left, left);
         __ cvtqsi2sd(xmm0, left);
       } else {
+#else
+      Label goto_slow;
+      __ AllocateHeapNumber(rcx, rbx, &goto_slow);
+      Comment perform_float(masm, "-- Perform float operation on smis");
+      if (op == Token::SHL) {
+        __ cvtlsi2sd(xmm0, left);
+        // drop arguments.
+        __ addq(rsp, Immediate(2 * kRegisterSize));
+      } else if (op == Token::SHR) {
+        // The value of left is from MacroAssembler::SmiShiftLogicalRight
+        // We allow logical shift value:
+        // 0 : might turn a signed integer into unsigned integer
+        // 1 : the value might be above 2^30 - 1
+        __ cvtqsi2sd(xmm0, left);
+        // drop arguments.
+        __ addq(rsp, Immediate(2 * kRegisterSize));
+      } else {
+#endif
         FloatingPointHelper::LoadSSE2SmiOperands(masm);
         switch (op) {
         case Token::ADD: __ addsd(xmm0, xmm1); break;
         case Token::SUB: __ subsd(xmm0, xmm1); break;
         case Token::MUL: __ mulsd(xmm0, xmm1); break;
         case Token::DIV: __ divsd(xmm0, xmm1); break;
         default: UNREACHABLE();
         }
       }
       __ movsd(FieldOperand(rcx, HeapNumber::kValueOffset), xmm0);
       __ movq(rax, rcx);
       __ ret(0);
+#if !V8_USE_31_BITS_SMI_VALUE
     } else {
+#else
+      __ bind(&goto_slow);
+      if (op == Token::SHL || op == Token::SHR) {
+        __ pop(right);
+        __ pop(left);
+      }
+      __ jmp(slow);
+    } else {
+      // Restore the orignial left value
+      if (op == Token::SHL || op == Token::SHR) {
+        __ pop(right);
+        __ pop(left);
+      }
+#endif
       __ jmp(&fail);
     }
   }
 
   // 7. Non-smi operands reach the end of the code generated by
   //    GenerateSmiCode, and fall through to subsequent code,
   //    with the operands in rdx and rax.
   //    But first we check if non-smi values are HeapNumbers holding
   //    values that could be smi.
   __ bind(&not_smis);
@@ skipping 18 matching lines @@
 
 static void BinaryOpStub_GenerateHeapResultAllocation(MacroAssembler* masm,
                                                       Label* alloc_failure,
                                                       OverwriteMode mode);
 
 
 static void BinaryOpStub_GenerateFloatingPointCode(MacroAssembler* masm,
                                                    Label* allocation_failure,
                                                    Label* non_numeric_failure,
                                                    Token::Value op,
+#if V8_USE_31_BITS_SMI_VALUE
+                                                   BinaryOpIC::TypeInfo
+                                                       result_type,
+                                                   Label* non_int32_failure,
+#endif
                                                    OverwriteMode mode) {
   switch (op) {
     case Token::ADD:
     case Token::SUB:
     case Token::MUL:
     case Token::DIV: {
       FloatingPointHelper::LoadSSE2UnknownOperands(masm, non_numeric_failure);
 
       switch (op) {
         case Token::ADD: __ addsd(xmm0, xmm1); break;
         case Token::SUB: __ subsd(xmm0, xmm1); break;
         case Token::MUL: __ mulsd(xmm0, xmm1); break;
         case Token::DIV: __ divsd(xmm0, xmm1); break;
         default: UNREACHABLE();
       }
+#if V8_USE_31_BITS_SMI_VALUE
+      if (non_int32_failure != NULL) {
+        if (result_type <= BinaryOpIC::INT32) {
+          __ cvttsd2si(kScratchRegister, xmm0);
+          __ cvtlsi2sd(xmm2, kScratchRegister);
+          __ pcmpeqd(xmm2, xmm0);
+          __ movmskpd(rcx, xmm2);
+          __ testl(rcx, Immediate(1));
+          __ j(zero, non_int32_failure);
+        }
+      }
+#endif
       BinaryOpStub_GenerateHeapResultAllocation(
           masm, allocation_failure, mode);
       __ movsd(FieldOperand(rax, HeapNumber::kValueOffset), xmm0);
       __ ret(0);
       break;
     }
     case Token::MOD: {
       // For MOD we jump to the allocation_failure label, to call runtime.
       __ jmp(allocation_failure);
       break;
     }
     case Token::BIT_OR:
     case Token::BIT_AND:
     case Token::BIT_XOR:
     case Token::SAR:
     case Token::SHL:
     case Token::SHR: {
       Label non_smi_shr_result;
       Register heap_number_map = r9;
+#if V8_USE_31_BITS_SMI_VALUE
+      Label goto_non_numeric_failure;
+      // Push arguments on stack
+      __ push(rdx);
+      __ push(rax);
+#endif
       __ LoadRoot(heap_number_map, Heap::kHeapNumberMapRootIndex);
+#if !V8_USE_31_BITS_SMI_VALUE
       FloatingPointHelper::LoadAsIntegers(masm, non_numeric_failure,
                                           heap_number_map);
+#else
+      FloatingPointHelper::LoadAsIntegers(masm, &goto_non_numeric_failure,
+                                          heap_number_map);
+#endif
       switch (op) {
         case Token::BIT_OR:  __ orl(rax, rcx); break;
         case Token::BIT_AND: __ andl(rax, rcx); break;
         case Token::BIT_XOR: __ xorl(rax, rcx); break;
         case Token::SAR: __ sarl_cl(rax); break;
         case Token::SHL: __ shll_cl(rax); break;
         case Token::SHR: {
           __ shrl_cl(rax);
+#if !V8_USE_31_BITS_SMI_VALUE
           // Check if result is negative. This can only happen for a shift
           // by zero.
           __ testl(rax, rax);
           __ j(negative, &non_smi_shr_result);
+#endif
           break;
         }
         default: UNREACHABLE();
       }
+#if !V8_USE_31_BITS_SMI_VALUE
       STATIC_ASSERT(kSmiValueSize == 32);
+#else
+      STATIC_ASSERT(kSmiValueSize == 31);
+      if (op == Token::SHR) {
+        __ testl(rax, Immediate(0xc0000000));
+        __ j(not_zero, &non_smi_shr_result);
+      } else {
+        __ cmpl(rax, Immediate(0xc0000000));
+        __ j(negative, &non_smi_shr_result, Label::kNear);
+      }
+      // drop arguments.
+      __ addq(rsp, Immediate(2 * kRegisterSize));
+#endif
       // Tag smi result and return.
       __ Integer32ToSmi(rax, rax);
       __ Ret();
 
+#ifdef V8_USE_31_BITS_SMI_VALUE
+      __ bind(&goto_non_numeric_failure);
+      // drop arguments.
+      __ pop(rax);
+      __ pop(rdx);
+      __ jmp(non_numeric_failure);
+#endif
+
+#if !V8_USE_31_BITS_SMI_VALUE
       // Logical shift right can produce an unsigned int32 that is not
       // an int32, and so is not in the smi range.  Allocate a heap number
       // in that case.
       if (op == Token::SHR) {
         __ bind(&non_smi_shr_result);
         Label allocation_failed;
         __ movl(rbx, rax);  // rbx holds result value (uint32 value as int64).
         // Allocate heap number in new space.
         // Not using AllocateHeapNumber macro in order to reuse
         // already loaded heap_number_map.
         __ Allocate(HeapNumber::kSize, rax, rdx, no_reg, &allocation_failed,
                     TAG_OBJECT);
         // Set the map.
         __ AssertRootValue(heap_number_map,
                            Heap::kHeapNumberMapRootIndex,
                            "HeapNumberMap register clobbered.");
         __ movq(FieldOperand(rax, HeapObject::kMapOffset),
                 heap_number_map);
         __ cvtqsi2sd(xmm0, rbx);
         __ movsd(FieldOperand(rax, HeapNumber::kValueOffset), xmm0);
         __ Ret();
 
         __ bind(&allocation_failed);
         // We need tagged values in rdx and rax for the following code,
         // not int32 in rax and rcx.
         __ Integer32ToSmi(rax, rcx);
         __ Integer32ToSmi(rdx, rbx);
         __ jmp(allocation_failure);
       }
+#else
+      __ bind(&non_smi_shr_result);
+      Label allocation_failed;
+      __ movl(rbx, rax);  // rbx holds result value (uint32 value as int64).
+      // Allocate heap number in new space.
+      // Not using AllocateHeapNumber macro in order to reuse
+      // already loaded heap_number_map.
+      Label skip_allocation;
+      switch (mode) {
+        case OVERWRITE_LEFT: {
+          __ movq(rax, Operand(rsp, 1 * kRegisterSize));
+          __ JumpIfNotSmi(rax, &skip_allocation);
+          __ Allocate(HeapNumber::kSize, rax, r8, no_reg, &allocation_failed,
+                      TAG_OBJECT);
+          __ bind(&skip_allocation);
+          break;
+        }
+        case OVERWRITE_RIGHT:
+          __ movq(rax, Operand(rsp, 0 * kRegisterSize));
+          __ JumpIfNotSmi(rax, &skip_allocation);
+          // Fall through!
+        case NO_OVERWRITE:
+          __ Allocate(HeapNumber::kSize, rax, r8, no_reg, &allocation_failed,
+                      TAG_OBJECT);
+          __ bind(&skip_allocation);
+          break;
+        default: UNREACHABLE();
+      }
+      // Set the map.
+      __ AssertRootValue(heap_number_map,
+                         Heap::kHeapNumberMapRootIndex,
+                         "HeapNumberMap register clobbered.");
+      __ movq(FieldOperand(rax, HeapObject::kMapOffset),
+              heap_number_map);
+      if (op == Token::SHR) {
+        __ cvtqsi2sd(xmm0, rbx);
+      } else {
+        // All other operations returns a signed int32, so we
+        // use lsi2sd here to retain the sign bit.
+        __ cvtlsi2sd(xmm0, rbx);
+      }
+      __ movsd(FieldOperand(rax, HeapNumber::kValueOffset), xmm0);
+      // drop arguments.
+      __ addq(rsp, Immediate(2 * kRegisterSize));
+      __ Ret();
+
+      __ bind(&allocation_failed);
+      // Restore arguments from stack.
+      __ pop(rax);
+      __ pop(rdx);
+      __ jmp(allocation_failure);
+#endif
       break;
     }
     default: UNREACHABLE(); break;
   }
   // No fall-through from this generated code.
   if (FLAG_debug_code) {
     __ Abort("Unexpected fall-through in "
              "BinaryStub_GenerateFloatingPointCode.");
   }
 }
@@ skipping 75 matching lines @@
       FrameScope scope(masm, StackFrame::INTERNAL);
       GenerateRegisterArgsPush(masm);
       GenerateCallRuntime(masm);
     }
     __ Ret();
   }
 }
 
 
 void BinaryOpStub::GenerateInt32Stub(MacroAssembler* masm) {
+#if !V8_USE_31_BITS_SMI_VALUE
   // The int32 case is identical to the Smi case.  We avoid creating this
   // ic state on x64.
   UNREACHABLE();
+#else
+  ASSERT(Max(left_type_, right_type_) == BinaryOpIC::INT32);
+
+  Label gc_required, not_number, not_int32;
+  BinaryOpStub_GenerateFloatingPointCode(masm, &gc_required, &not_number,
+                                         op_, result_type_, &not_int32, mode_);
+
+  __ bind(&not_number);
+  __ bind(&not_int32);
+  GenerateTypeTransition(masm);
+
+  __ bind(&gc_required);
+  {
+    FrameScope scope(masm, StackFrame::INTERNAL);
+    GenerateRegisterArgsPush(masm);
+    GenerateCallRuntime(masm);
+  }
+  __ Ret();
+#endif
 }
 
 
 void BinaryOpStub::GenerateBothStringStub(MacroAssembler* masm) {
   Label call_runtime;
   ASSERT(left_type_ == BinaryOpIC::STRING && right_type_ == BinaryOpIC::STRING);
   ASSERT(op_ == Token::ADD);
   // If both arguments are strings, call the string add stub.
   // Otherwise, do a transition.
 
@@ skipping 84 matching lines @@
   // It could be that only SMIs have been seen at either the left
   // or the right operand. For precise type feedback, patch the IC
   // again if this changes.
   if (left_type_ == BinaryOpIC::SMI) {
     BinaryOpStub_CheckSmiInput(masm, rdx, &not_number);
   }
   if (right_type_ == BinaryOpIC::SMI) {
     BinaryOpStub_CheckSmiInput(masm, rax, &not_number);
   }
 
+#if !V8_USE_31_BITS_SMI_VALUE
   BinaryOpStub_GenerateFloatingPointCode(
       masm, &gc_required, &not_number, op_, mode_);
+#else
+  BinaryOpStub_GenerateFloatingPointCode(
+      masm, &gc_required, &not_number, op_, result_type_, NULL, mode_);
+#endif
 
   __ bind(&not_number);
   GenerateTypeTransition(masm);
 
   __ bind(&gc_required);
   {
     FrameScope scope(masm, StackFrame::INTERNAL);
     GenerateRegisterArgsPush(masm);
     GenerateCallRuntime(masm);
   }
   __ Ret();
 }
 
 
 void BinaryOpStub::GenerateGeneric(MacroAssembler* masm) {
   Label call_runtime, call_string_add_or_runtime;
 
   BinaryOpStub_GenerateSmiCode(
       masm, &call_runtime, ALLOW_HEAPNUMBER_RESULTS, op_);
 
+#if !V8_USE_31_BITS_SMI_VALUE
   BinaryOpStub_GenerateFloatingPointCode(
       masm, &call_runtime, &call_string_add_or_runtime, op_, mode_);
+#else
+  BinaryOpStub_GenerateFloatingPointCode(
+      masm, &call_runtime, &call_string_add_or_runtime, op_,
+      result_type_, NULL, mode_);
+#endif
 
   __ bind(&call_string_add_or_runtime);
   if (op_ == Token::ADD) {
     GenerateAddStrings(masm);
   }
 
   __ bind(&call_runtime);
   {
     FrameScope scope(masm, StackFrame::INTERNAL);
     GenerateRegisterArgsPush(masm);
@@ skipping 530 matching lines @@
   // Convert HeapNumber to smi if possible.
   __ movsd(xmm0, FieldOperand(first, HeapNumber::kValueOffset));
   __ movq(scratch2, xmm0);
   __ cvttsd2siq(smi_result, xmm0);
   // Check if conversion was successful by converting back and
   // comparing to the original double's bits.
   __ cvtlsi2sd(xmm1, smi_result);
   __ movq(kScratchRegister, xmm1);
   __ cmpq(scratch2, kScratchRegister);
   __ j(not_equal, on_not_smis);
+#if V8_USE_31_BITS_SMI_VALUE
+  __ cmpl(smi_result, Immediate(0xc0000000));
+  __ j(negative, on_not_smis);
+#endif
   __ Integer32ToSmi(first, smi_result);
 
   __ bind(&first_done);
   __ JumpIfSmi(second, (on_success != NULL) ? on_success : &done);
   __ bind(&first_smi);
   __ AssertNotSmi(second);
   __ cmpq(FieldOperand(second, HeapObject::kMapOffset), heap_number_map);
   __ j(not_equal,
        (convert_undefined == CONVERT_UNDEFINED_TO_ZERO)
            ? &maybe_undefined_second
            : on_not_smis);
   // Convert second to smi, if possible.
   __ movsd(xmm0, FieldOperand(second, HeapNumber::kValueOffset));
   __ movq(scratch2, xmm0);
   __ cvttsd2siq(smi_result, xmm0);
   __ cvtlsi2sd(xmm1, smi_result);
   __ movq(kScratchRegister, xmm1);
   __ cmpq(scratch2, kScratchRegister);
   __ j(not_equal, on_not_smis);
+#if V8_USE_31_BITS_SMI_VALUE
+  __ cmpl(smi_result, Immediate(0xc0000000));
+  __ j(negative, on_not_smis);
+#endif
   __ Integer32ToSmi(second, smi_result);
   if (on_success != NULL) {
     __ jmp(on_success);
   } else {
     __ jmp(&done);
   }
 
   __ bind(&maybe_undefined_first);
   __ CompareRoot(first, Heap::kUndefinedValueRootIndex);
   __ j(not_equal, on_not_smis);
@@ skipping 1477 matching lines @@
   Condition cc = GetCondition();
   Factory* factory = masm->isolate()->factory();
 
   Label miss;
   CheckInputType(masm, rdx, left_, &miss);
   CheckInputType(masm, rax, right_, &miss);
 
   // Compare two smis.
   Label non_smi, smi_done;
   __ JumpIfNotBothSmi(rax, rdx, &non_smi);
+#if !V8_USE_31_BITS_SMI_VALUE
   __ subq(rdx, rax);
+#else
+  __ subl(rdx, rax);
+#endif
   __ j(no_overflow, &smi_done);
+#if !V8_USE_31_BITS_SMI_VALUE
   __ not_(rdx);  // Correct sign in case of overflow. rdx cannot be 0 here.
+#else
+  __ notl(rdx);
+#endif
   __ bind(&smi_done);
+#if V8_USE_31_BITS_SMI_VALUE
+  __ movsxlq(rdx, rdx);
+#endif
   __ movq(rax, rdx);
   __ ret(0);
   __ bind(&non_smi);
 
   // The compare stub returns a positive, negative, or zero 64-bit integer
   // value in rax, corresponding to result of comparing the two inputs.
   // NOTICE! This code is only reached after a smi-fast-case check, so
   // it is certain that at least one operand isn't a smi.
 
   // Two identical objects are equal unless they are both NaN or undefined.
@@ skipping 1288 matching lines @@
   // by the code above.
   if ((flags_ & STRING_ADD_CHECK_BOTH) != STRING_ADD_CHECK_BOTH) {
     __ movq(r8, FieldOperand(rax, HeapObject::kMapOffset));
     __ movq(r9, FieldOperand(rdx, HeapObject::kMapOffset));
   }
   // Get the instance types of the two strings as they will be needed soon.
   __ movzxbl(r8, FieldOperand(r8, Map::kInstanceTypeOffset));
   __ movzxbl(r9, FieldOperand(r9, Map::kInstanceTypeOffset));
 
   // Look at the length of the result of adding the two strings.
+#ifndef V8_USE_31_BITS_SMI_VALUE
   STATIC_ASSERT(String::kMaxLength <= Smi::kMaxValue / 2);
   __ SmiAdd(rbx, rbx, rcx);
+#else
+  __ SmiAdd(rbx, rbx, rcx, &call_runtime);
+#endif
   // Use the string table when adding two one character strings, as it
   // helps later optimizations to return an internalized string here.
   __ SmiCompare(rbx, Smi::FromInt(2));
   __ j(not_equal, &longer_than_two);
 
   // Check that both strings are non-external ASCII strings.
   __ JumpIfBothInstanceTypesAreNotSequentialAscii(r8, r9, rbx, rcx,
                                                   &call_runtime);
 
   // Get the two characters forming the sub string.
@@ skipping 957 matching lines @@
 void ICCompareStub::GenerateSmis(MacroAssembler* masm) {
   ASSERT(state_ == CompareIC::SMI);
   Label miss;
   __ JumpIfNotBothSmi(rdx, rax, &miss, Label::kNear);
 
   if (GetCondition() == equal) {
     // For equality we do not care about the sign of the result.
     __ subq(rax, rdx);
   } else {
     Label done;
+#if !V8_USE_31_BITS_SMI_VALUE
     __ subq(rdx, rax);
+#else
+    __ subl(rdx, rax);
+#endif
     __ j(no_overflow, &done, Label::kNear);
+#if !V8_USE_31_BITS_SMI_VALUE
     // Correct sign of result in case of overflow.
     __ not_(rdx);
+#else
+    __ notl(rdx);
+#endif
     __ bind(&done);
+#if V8_USE_31_BITS_SMI_VALUE
+    __ movsxlq(rdx, rdx);
+#endif
     __ movq(rax, rdx);
   }
   __ ret(0);
 
   __ bind(&miss);
   GenerateMiss(masm);
 }
 
 
 void ICCompareStub::GenerateNumbers(MacroAssembler* masm) {
@@ skipping 1247 matching lines @@
   __ bind(&fast_elements_case);
   GenerateCase(masm, FAST_ELEMENTS);
 }
 
 
 #undef __
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_X64