| Index: src/compiler/mips64/code-generator-mips64.cc
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| diff --git a/src/compiler/mips64/code-generator-mips64.cc b/src/compiler/mips64/code-generator-mips64.cc
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| index e362b18968a0da35ff07cc2c5461df16c4b3fbae..9e88bf184ddf9e62dda1f5929a89cfd048608591 100644
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| --- a/src/compiler/mips64/code-generator-mips64.cc
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| +++ b/src/compiler/mips64/code-generator-mips64.cc
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| @@ -851,6 +851,9 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
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|      case kMips64Mul:
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|        __ Mul(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
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|        break;
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| +    case kMips64MulOvf:
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| +      // Pseudo-instruction used for overflow/branch. No opcode emitted here.
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| +      break;
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|      case kMips64MulHigh:
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|        __ Mulh(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
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|        break;
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| @@ -1876,6 +1879,20 @@ void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) {
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|          UNSUPPORTED_COND(kMips64DsubOvf, branch->condition);
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|          break;
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|      }
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| +  } else if (instr->arch_opcode() == kMips64MulOvf) {
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| +    switch (branch->condition) {
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| +      case kOverflow: {
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| +        __ MulBranchOvf(i.OutputRegister(), i.InputRegister(0),
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| +                        i.InputOperand(1), tlabel, flabel, kScratchReg);
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| +      } break;
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| +      case kNotOverflow: {
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| +        __ MulBranchOvf(i.OutputRegister(), i.InputRegister(0),
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| +                        i.InputOperand(1), flabel, tlabel, kScratchReg);
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| +      } break;
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| +      default:
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| +        UNSUPPORTED_COND(kMips64MulOvf, branch->condition);
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| +        break;
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| +    }
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|    } else if (instr->arch_opcode() == kMips64Cmp) {
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|      cc = FlagsConditionToConditionCmp(branch->condition);
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|      __ Branch(tlabel, cc, i.InputRegister(0), i.InputOperand(1));
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| @@ -1951,7 +1968,8 @@ void CodeGenerator::AssembleArchBoolean(Instruction* instr,
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|        __ xori(result, result, 1);
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|      return;
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|    } else if (instr->arch_opcode() == kMips64DaddOvf ||
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| -             instr->arch_opcode() == kMips64DsubOvf) {
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| +             instr->arch_opcode() == kMips64DsubOvf ||
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| +             instr->arch_opcode() == kMips64MulOvf) {
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|      Label flabel, tlabel;
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|      switch (instr->arch_opcode()) {
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|        case kMips64DaddOvf:
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| @@ -1963,6 +1981,10 @@ void CodeGenerator::AssembleArchBoolean(Instruction* instr,
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|          __ DsubBranchNoOvf(i.OutputRegister(), i.InputRegister(0),
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|                             i.InputOperand(1), &flabel);
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|          break;
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| +      case kMips64MulOvf:
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| +        __ MulBranchNoOvf(i.OutputRegister(), i.InputRegister(0),
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| +                          i.InputOperand(1), &flabel, kScratchReg);
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| +        break;
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|        default:
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|          UNREACHABLE();
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|          break;
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| 
 |