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Side by Side Diff: src/compiler/mips64/code-generator-mips64.cc

Issue 2101123005: [turbofan] Introduce integer multiplication with overflow. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: REBASE. Created 4 years, 5 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/ast/scopes.h" 5 #include "src/ast/scopes.h"
6 #include "src/compiler/code-generator.h" 6 #include "src/compiler/code-generator.h"
7 #include "src/compiler/code-generator-impl.h" 7 #include "src/compiler/code-generator-impl.h"
8 #include "src/compiler/gap-resolver.h" 8 #include "src/compiler/gap-resolver.h"
9 #include "src/compiler/node-matchers.h" 9 #include "src/compiler/node-matchers.h"
10 #include "src/compiler/osr.h" 10 #include "src/compiler/osr.h"
(...skipping 833 matching lines...) Expand 10 before | Expand all | Expand 10 after
844 break; 844 break;
845 case kMips64Dsub: 845 case kMips64Dsub:
846 __ Dsubu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 846 __ Dsubu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
847 break; 847 break;
848 case kMips64DsubOvf: 848 case kMips64DsubOvf:
849 // Pseudo-instruction used for overflow/branch. No opcode emitted here. 849 // Pseudo-instruction used for overflow/branch. No opcode emitted here.
850 break; 850 break;
851 case kMips64Mul: 851 case kMips64Mul:
852 __ Mul(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 852 __ Mul(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
853 break; 853 break;
854 case kMips64MulOvf:
855 // Pseudo-instruction used for overflow/branch. No opcode emitted here.
856 break;
854 case kMips64MulHigh: 857 case kMips64MulHigh:
855 __ Mulh(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 858 __ Mulh(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
856 break; 859 break;
857 case kMips64MulHighU: 860 case kMips64MulHighU:
858 __ Mulhu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 861 __ Mulhu(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
859 break; 862 break;
860 case kMips64DMulHigh: 863 case kMips64DMulHigh:
861 __ Dmulh(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1)); 864 __ Dmulh(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
862 break; 865 break;
863 case kMips64Div: 866 case kMips64Div:
(...skipping 1005 matching lines...) Expand 10 before | Expand all | Expand 10 after
1869 i.InputOperand(1), tlabel, flabel); 1872 i.InputOperand(1), tlabel, flabel);
1870 break; 1873 break;
1871 case kNotOverflow: 1874 case kNotOverflow:
1872 __ DsubBranchOvf(i.OutputRegister(), i.InputRegister(0), 1875 __ DsubBranchOvf(i.OutputRegister(), i.InputRegister(0),
1873 i.InputOperand(1), flabel, tlabel); 1876 i.InputOperand(1), flabel, tlabel);
1874 break; 1877 break;
1875 default: 1878 default:
1876 UNSUPPORTED_COND(kMips64DsubOvf, branch->condition); 1879 UNSUPPORTED_COND(kMips64DsubOvf, branch->condition);
1877 break; 1880 break;
1878 } 1881 }
1882 } else if (instr->arch_opcode() == kMips64MulOvf) {
1883 switch (branch->condition) {
1884 case kOverflow: {
1885 __ MulBranchOvf(i.OutputRegister(), i.InputRegister(0),
1886 i.InputOperand(1), tlabel, flabel, kScratchReg);
1887 } break;
1888 case kNotOverflow: {
1889 __ MulBranchOvf(i.OutputRegister(), i.InputRegister(0),
1890 i.InputOperand(1), flabel, tlabel, kScratchReg);
1891 } break;
1892 default:
1893 UNSUPPORTED_COND(kMips64MulOvf, branch->condition);
1894 break;
1895 }
1879 } else if (instr->arch_opcode() == kMips64Cmp) { 1896 } else if (instr->arch_opcode() == kMips64Cmp) {
1880 cc = FlagsConditionToConditionCmp(branch->condition); 1897 cc = FlagsConditionToConditionCmp(branch->condition);
1881 __ Branch(tlabel, cc, i.InputRegister(0), i.InputOperand(1)); 1898 __ Branch(tlabel, cc, i.InputRegister(0), i.InputOperand(1));
1882 } else if (instr->arch_opcode() == kMips64CmpS) { 1899 } else if (instr->arch_opcode() == kMips64CmpS) {
1883 if (!convertCondition(branch->condition, cc)) { 1900 if (!convertCondition(branch->condition, cc)) {
1884 UNSUPPORTED_COND(kMips64CmpS, branch->condition); 1901 UNSUPPORTED_COND(kMips64CmpS, branch->condition);
1885 } 1902 }
1886 FPURegister left = i.InputOrZeroSingleRegister(0); 1903 FPURegister left = i.InputOrZeroSingleRegister(0);
1887 FPURegister right = i.InputOrZeroSingleRegister(1); 1904 FPURegister right = i.InputOrZeroSingleRegister(1);
1888 if ((left.is(kDoubleRegZero) || right.is(kDoubleRegZero)) && 1905 if ((left.is(kDoubleRegZero) || right.is(kDoubleRegZero)) &&
(...skipping 55 matching lines...) Expand 10 before | Expand all | Expand 10 after
1944 instr->arch_opcode() == kMips64Dsub) { 1961 instr->arch_opcode() == kMips64Dsub) {
1945 cc = FlagsConditionToConditionOvf(condition); 1962 cc = FlagsConditionToConditionOvf(condition);
1946 // Check for overflow creates 1 or 0 for result. 1963 // Check for overflow creates 1 or 0 for result.
1947 __ dsrl32(kScratchReg, i.OutputRegister(), 31); 1964 __ dsrl32(kScratchReg, i.OutputRegister(), 31);
1948 __ srl(at, i.OutputRegister(), 31); 1965 __ srl(at, i.OutputRegister(), 31);
1949 __ xor_(result, kScratchReg, at); 1966 __ xor_(result, kScratchReg, at);
1950 if (cc == eq) // Toggle result for not overflow. 1967 if (cc == eq) // Toggle result for not overflow.
1951 __ xori(result, result, 1); 1968 __ xori(result, result, 1);
1952 return; 1969 return;
1953 } else if (instr->arch_opcode() == kMips64DaddOvf || 1970 } else if (instr->arch_opcode() == kMips64DaddOvf ||
1954 instr->arch_opcode() == kMips64DsubOvf) { 1971 instr->arch_opcode() == kMips64DsubOvf ||
1972 instr->arch_opcode() == kMips64MulOvf) {
1955 Label flabel, tlabel; 1973 Label flabel, tlabel;
1956 switch (instr->arch_opcode()) { 1974 switch (instr->arch_opcode()) {
1957 case kMips64DaddOvf: 1975 case kMips64DaddOvf:
1958 __ DaddBranchNoOvf(i.OutputRegister(), i.InputRegister(0), 1976 __ DaddBranchNoOvf(i.OutputRegister(), i.InputRegister(0),
1959 i.InputOperand(1), &flabel); 1977 i.InputOperand(1), &flabel);
1960 1978
1961 break; 1979 break;
1962 case kMips64DsubOvf: 1980 case kMips64DsubOvf:
1963 __ DsubBranchNoOvf(i.OutputRegister(), i.InputRegister(0), 1981 __ DsubBranchNoOvf(i.OutputRegister(), i.InputRegister(0),
1964 i.InputOperand(1), &flabel); 1982 i.InputOperand(1), &flabel);
1965 break; 1983 break;
1984 case kMips64MulOvf:
1985 __ MulBranchNoOvf(i.OutputRegister(), i.InputRegister(0),
1986 i.InputOperand(1), &flabel, kScratchReg);
1987 break;
1966 default: 1988 default:
1967 UNREACHABLE(); 1989 UNREACHABLE();
1968 break; 1990 break;
1969 } 1991 }
1970 __ li(result, 1); 1992 __ li(result, 1);
1971 __ Branch(&tlabel); 1993 __ Branch(&tlabel);
1972 __ bind(&flabel); 1994 __ bind(&flabel);
1973 __ li(result, 0); 1995 __ li(result, 0);
1974 __ bind(&tlabel); 1996 __ bind(&tlabel);
1975 } else if (instr->arch_opcode() == kMips64Cmp) { 1997 } else if (instr->arch_opcode() == kMips64Cmp) {
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2422 padding_size -= v8::internal::Assembler::kInstrSize; 2444 padding_size -= v8::internal::Assembler::kInstrSize;
2423 } 2445 }
2424 } 2446 }
2425 } 2447 }
2426 2448
2427 #undef __ 2449 #undef __
2428 2450
2429 } // namespace compiler 2451 } // namespace compiler
2430 } // namespace internal 2452 } // namespace internal
2431 } // namespace v8 2453 } // namespace v8
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