[turbofan] Introduce integer multiplication with overflow.

src/compiler/arm64/code-generator-arm64.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/code-generator.h"
 
 #include "src/arm64/frames-arm64.h"
 #include "src/arm64/macro-assembler-arm64.h"
 #include "src/ast/scopes.h"
 #include "src/compiler/code-generator-impl.h"
@@ skipping 101 matching lines @@
       case kMode_Operand2_R_ROR_I:
         return Operand(InputRegister32(index), ROR, InputInt5(index + 1));
       case kMode_Operand2_R_UXTB:
         return Operand(InputRegister32(index), UXTB);
       case kMode_Operand2_R_UXTH:
         return Operand(InputRegister32(index), UXTH);
       case kMode_Operand2_R_SXTB:
         return Operand(InputRegister32(index), SXTB);
       case kMode_Operand2_R_SXTH:
         return Operand(InputRegister32(index), SXTH);
+      case kMode_Operand2_R_SXTW:
+        return Operand(InputRegister32(index), SXTW);
       case kMode_MRI:
       case kMode_MRR:
         break;
     }
     UNREACHABLE();
     return Operand(-1);
   }
 
   Operand InputOperand2_64(size_t index) {
     switch (AddressingModeField::decode(instr_->opcode())) {
       case kMode_None:
         return InputOperand64(index);
       case kMode_Operand2_R_LSL_I:
         return Operand(InputRegister64(index), LSL, InputInt6(index + 1));
       case kMode_Operand2_R_LSR_I:
         return Operand(InputRegister64(index), LSR, InputInt6(index + 1));
       case kMode_Operand2_R_ASR_I:
         return Operand(InputRegister64(index), ASR, InputInt6(index + 1));
       case kMode_Operand2_R_ROR_I:
         return Operand(InputRegister64(index), ROR, InputInt6(index + 1));
       case kMode_Operand2_R_UXTB:
         return Operand(InputRegister64(index), UXTB);
       case kMode_Operand2_R_UXTH:
         return Operand(InputRegister64(index), UXTH);
       case kMode_Operand2_R_SXTB:
         return Operand(InputRegister64(index), SXTB);
       case kMode_Operand2_R_SXTH:
         return Operand(InputRegister64(index), SXTH);
+      case kMode_Operand2_R_SXTW:
+        return Operand(InputRegister32(index), SXTW);
       case kMode_MRI:
       case kMode_MRR:
         break;
     }
     UNREACHABLE();
     return Operand(-1);
   }
 
   MemOperand MemoryOperand(size_t* first_index) {
     const size_t index = *first_index;
     switch (AddressingModeField::decode(instr_->opcode())) {
       case kMode_None:
       case kMode_Operand2_R_LSR_I:
       case kMode_Operand2_R_ASR_I:
       case kMode_Operand2_R_ROR_I:
       case kMode_Operand2_R_UXTB:
       case kMode_Operand2_R_UXTH:
       case kMode_Operand2_R_SXTB:
       case kMode_Operand2_R_SXTH:
+      case kMode_Operand2_R_SXTW:
         break;
       case kMode_Operand2_R_LSL_I:
         *first_index += 3;
         return MemOperand(InputRegister(index + 0), InputRegister(index + 1),
                           LSL, InputInt32(index + 2));
       case kMode_MRI:
         *first_index += 2;
         return MemOperand(InputRegister(index + 0), InputInt32(index + 1));
       case kMode_MRR:
         *first_index += 2;
@@ skipping 1069 matching lines @@
     case kArm64Clz32:
       __ Clz(i.OutputRegister32(), i.InputRegister32(0));
       break;
     case kArm64Rbit:
       __ Rbit(i.OutputRegister64(), i.InputRegister64(0));
       break;
     case kArm64Rbit32:
       __ Rbit(i.OutputRegister32(), i.InputRegister32(0));
       break;
     case kArm64Cmp:
-      __ Cmp(i.InputOrZeroRegister64(0), i.InputOperand(1));
+      if (AddressingModeField::decode(opcode) == kMode_Operand2_R_SXTW) {
+        __ Cmp(i.InputOrZeroRegister64(0), i.InputOperand2_32(1));
+      } else {
+        __ Cmp(i.InputOrZeroRegister64(0), i.InputOperand(1));
+      }
       break;
     case kArm64Cmp32:
       __ Cmp(i.InputOrZeroRegister32(0), i.InputOperand2_32(1));
       break;
     case kArm64Cmn:
       __ Cmn(i.InputOrZeroRegister64(0), i.InputOperand(1));
       break;
     case kArm64Cmn32:
       __ Cmn(i.InputOrZeroRegister32(0), i.InputOperand2_32(1));
       break;
@@ skipping 789 matching lines @@
       padding_size -= kInstructionSize;
     }
   }
 }
 
 #undef __
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8