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Issue 21004011: Implements the two argument shuffle SIMD instruction for ARM. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 7 years, 4 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include <math.h> // for isnan. 5 #include <math.h> // for isnan.
6 #include <setjmp.h> 6 #include <setjmp.h>
7 #include <stdlib.h> 7 #include <stdlib.h>
8 8
9 #include "vm/globals.h" 9 #include "vm/globals.h"
10 #if defined(TARGET_ARCH_ARM) 10 #if defined(TARGET_ARCH_ARM)
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2989 ASSERT((estimate >= 1.0) && (estimate <= (511.0/256.0))); 2989 ASSERT((estimate >= 1.0) && (estimate <= (511.0/256.0)));
2990 2990
2991 // result = sign : result_exp<7:0> : estimate<51:29> 2991 // result = sign : result_exp<7:0> : estimate<51:29>
2992 int32_t result_bits = 2992 int32_t result_bits =
2993 (a_bits & 0x80000000) | ((result_exp & 0xff) << 23) | 2993 (a_bits & 0x80000000) | ((result_exp & 0xff) << 23) |
2994 ((bit_cast<uint64_t, double>(estimate) >> 29) & 0x7fffff); 2994 ((bit_cast<uint64_t, double>(estimate) >> 29) & 0x7fffff);
2995 return bit_cast<float, int32_t>(result_bits); 2995 return bit_cast<float, int32_t>(result_bits);
2996 } 2996 }
2997 2997
2998 2998
2999 static void simd_value_swap(simd_value_t* s1, int i1,
3000 simd_value_t* s2, int i2) {
3001 uint32_t tmp;
3002 tmp = s1->data_[i1].u;
3003 s1->data_[i1].u = s2->data_[i2].u;
3004 s2->data_[i2].u = tmp;
3005 }
3006
3007
2999 void Simulator::DecodeSIMDDataProcessing(Instr* instr) { 3008 void Simulator::DecodeSIMDDataProcessing(Instr* instr) {
3000 ASSERT(instr->ConditionField() == kSpecialCondition); 3009 ASSERT(instr->ConditionField() == kSpecialCondition);
3001 3010
3002 if (instr->Bit(6) == 1) { 3011 if (instr->Bit(6) == 1) {
3003 // Q = 1, Using 128-bit Q registers. 3012 // Q = 1, Using 128-bit Q registers.
3004 const QRegister qd = instr->QdField(); 3013 const QRegister qd = instr->QdField();
3005 const QRegister qn = instr->QnField(); 3014 const QRegister qn = instr->QnField();
3006 const QRegister qm = instr->QmField(); 3015 const QRegister qm = instr->QmField();
3007 simd_value_t s8d; 3016 simd_value_t s8d;
3008 simd_value_t s8n; 3017 simd_value_t s8n;
(...skipping 215 matching lines...) Expand 10 before | Expand all | Expand 10 after
3224 // Format(instr, "vdupw 'qd, 'dm['imm4_vdup]"); 3233 // Format(instr, "vdupw 'qd, 'dm['imm4_vdup]");
3225 int32_t* dm_w = reinterpret_cast<int32_t*>(&dm_value); 3234 int32_t* dm_w = reinterpret_cast<int32_t*>(&dm_value);
3226 idx = imm4 >> 3; 3235 idx = imm4 >> 3;
3227 int32_t val = dm_w[idx]; 3236 int32_t val = dm_w[idx];
3228 for (int i = 0; i < 4; i++) { 3237 for (int i = 0; i < 4; i++) {
3229 s8d.data_[i].u = val; 3238 s8d.data_[i].u = val;
3230 } 3239 }
3231 } else { 3240 } else {
3232 UnimplementedInstruction(instr); 3241 UnimplementedInstruction(instr);
3233 } 3242 }
3243 } else if ((instr->Bits(8, 4) == 1) && (instr->Bit(4) == 0) &&
3244 (instr->Bits(20, 2) == 3) && (instr->Bits(23, 2) == 3) &&
3245 (instr->Bit(7) == 1) && (instr->Bits(16, 4) == 10)) {
3246 // Format(instr, "vzipqw 'qd, 'qm");
3247 get_qregister(qd, &s8d);
3248
3249 // Interleave the elements with the low words in qd, and the high words
3250 // in qm.
3251 simd_value_swap(&s8d, 3, &s8m, 2);
3252 simd_value_swap(&s8d, 3, &s8m, 1);
3253 simd_value_swap(&s8d, 2, &s8m, 0);
3254 simd_value_swap(&s8d, 2, &s8d, 1);
3255
3256 set_qregister(qm, s8m); // Writes both qd and qm.
3234 } else if ((instr->Bits(8, 4) == 8) && (instr->Bit(4) == 1) && 3257 } else if ((instr->Bits(8, 4) == 8) && (instr->Bit(4) == 1) &&
3235 (instr->Bits(23, 2) == 2)) { 3258 (instr->Bits(23, 2) == 2)) {
3236 // Format(instr, "vceqq'sz 'qd, 'qn, 'qm"); 3259 // Format(instr, "vceqq'sz 'qd, 'qn, 'qm");
3237 const int size = instr->Bits(20, 2); 3260 const int size = instr->Bits(20, 2);
3238 if (size == 0) { 3261 if (size == 0) {
3239 for (int i = 0; i < 16; i++) { 3262 for (int i = 0; i < 16; i++) {
3240 s8d_8[i] = s8n_8[i] == s8m_8[i] ? 0xff : 0; 3263 s8d_8[i] = s8n_8[i] == s8m_8[i] ? 0xff : 0;
3241 } 3264 }
3242 } else if (size == 1) { 3265 } else if (size == 1) {
3243 for (int i = 0; i < 8; i++) { 3266 for (int i = 0; i < 8; i++) {
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3634 set_register(kExceptionObjectReg, bit_cast<int32_t>(raw_exception)); 3657 set_register(kExceptionObjectReg, bit_cast<int32_t>(raw_exception));
3635 set_register(kStackTraceObjectReg, bit_cast<int32_t>(raw_stacktrace)); 3658 set_register(kStackTraceObjectReg, bit_cast<int32_t>(raw_stacktrace));
3636 buf->Longjmp(); 3659 buf->Longjmp();
3637 } 3660 }
3638 3661
3639 } // namespace dart 3662 } // namespace dart
3640 3663
3641 #endif // !defined(HOST_ARCH_ARM) 3664 #endif // !defined(HOST_ARCH_ARM)
3642 3665
3643 #endif // defined TARGET_ARCH_ARM 3666 #endif // defined TARGET_ARCH_ARM
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