Reorder X8664 Register Defs so that scratch registers are allocated first

src/IceInstX8664.cpp

Index: src/IceInstX8664.cpp
diff --git a/src/IceInstX8664.cpp b/src/IceInstX8664.cpp
index afb458047a89784e30d763b9400ada315248b924..d83c47e21c66f506e1c467ba10f9f3a62f4a653e 100644
--- a/src/IceInstX8664.cpp
+++ b/src/IceInstX8664.cpp
@@ -161,10 +161,10 @@ void TargetX8664Traits::X86OperandMem::emit(const Cfg *Func) const {
       const Type MemType = getType();
       if (Base->getType() != IceType_i32 && MemType != IceType_void) {
         // X86-64 is ILP32, but %rsp and %rbp are accessed as 64-bit registers.
-        // For filetype=asm, they need to be emitted as their 32-bit sibilings.
+        // For filetype=asm, they need to be emitted as their 32-bit siblings.
         assert(Base->getType() == IceType_i64);
-        assert(Base->getRegNum() == RegX8664::Encoded_Reg_rsp ||
-               Base->getRegNum() == RegX8664::Encoded_Reg_rbp ||
+        assert(getEncodedGPR(Base->getRegNum()) == RegX8664::Encoded_Reg_rsp ||
+               getEncodedGPR(Base->getRegNum()) == RegX8664::Encoded_Reg_rbp ||
                getType() == IceType_void);
         B = B->asType(Func, IceType_i32, X8664::Traits::getGprForType(
                                              IceType_i32, Base->getRegNum()));