Reorder X8664 Register Defs so that scratch registers are allocated first

src/IceInstX8664.cpp

Index: src/IceInstX8664.cpp
diff --git a/src/IceInstX8664.cpp b/src/IceInstX8664.cpp
index afb458047a89784e30d763b9400ada315248b924..1bdb13d04391ca2d9a9a55f46085be738f329814 100644
--- a/src/IceInstX8664.cpp
+++ b/src/IceInstX8664.cpp
@@ -163,9 +163,6 @@ void TargetX8664Traits::X86OperandMem::emit(const Cfg *Func) const {
         // X86-64 is ILP32, but %rsp and %rbp are accessed as 64-bit registers.
         // For filetype=asm, they need to be emitted as their 32-bit sibilings.

[Jim Stichnoth, 2016/06/27 22:06:55]

siblings

[manasijm, 2016/06/27 22:37:09]

Done.

         assert(Base->getType() == IceType_i64);
-        assert(Base->getRegNum() == RegX8664::Encoded_Reg_rsp ||

[Jim Stichnoth, 2016/06/27 22:06:55]

This assert can/should stay.

However, change "Base->getRegNum()" to "getEncodedGPR(Base->getRegNum())".

[manasijm, 2016/06/27 22:37:09]

Done.

-               Base->getRegNum() == RegX8664::Encoded_Reg_rbp ||
-               getType() == IceType_void);
         B = B->asType(Func, IceType_i32, X8664::Traits::getGprForType(
                                              IceType_i32, Base->getRegNum()));
       }