Index: src/arm64/assembler-arm64-inl.h |
diff --git a/src/arm64/assembler-arm64-inl.h b/src/arm64/assembler-arm64-inl.h |
index c509e05a5b7f7a3d4b43cda189b91980b6681e6f..0b58b08a7adecba84ef3c811350dd3f75d470558 100644 |
--- a/src/arm64/assembler-arm64-inl.h |
+++ b/src/arm64/assembler-arm64-inl.h |
@@ -589,30 +589,34 @@ Address Assembler::return_address_from_call_start(Address pc) { |
// sequences: |
// |
// Without relocation: |
- // movz ip0, #(target & 0x000000000000ffff) |
- // movk ip0, #(target & 0x00000000ffff0000) |
- // movk ip0, #(target & 0x0000ffff00000000) |
- // movk ip0, #(target & 0xffff000000000000) |
- // blr ip0 |
+ // movz temp |
+ // [movk temp] (up to 2 instructions). |
+ // blr temp |
// |
// With relocation: |
- // ldr ip0, =target |
- // blr ip0 |
+ // ldr temp, =target |
+ // blr temp |
// |
// The return address is immediately after the blr instruction in both cases, |
// so it can be found by adding the call size to the address at the start of |
// the call sequence. |
- STATIC_ASSERT(Assembler::kCallSizeWithoutRelocation == 5 * kInstructionSize); |
STATIC_ASSERT(Assembler::kCallSizeWithRelocation == 2 * kInstructionSize); |
Instruction* instr = reinterpret_cast<Instruction*>(pc); |
if (instr->IsMovz()) { |
+ int movk_count; |
+ if (instr->following(1)->IsMovk()) { |
+ if (instr->following(2)->IsMovk()) { |
+ movk_count = 2; |
+ } else { |
+ movk_count = 1; |
+ } |
+ } else { |
+ movk_count = 0; |
+ } |
// Verify the instruction sequence. |
- ASSERT(instr->following(1)->IsMovk()); |
- ASSERT(instr->following(2)->IsMovk()); |
- ASSERT(instr->following(3)->IsMovk()); |
- ASSERT(instr->following(4)->IsBranchAndLinkToRegister()); |
- return pc + Assembler::kCallSizeWithoutRelocation; |
+ ASSERT(instr->following(movk_count + 1)->IsBranchAndLinkToRegister()); |
+ return pc + (movk_count + 2) * kInstructionSize; |
} else { |
// Verify the instruction sequence. |
ASSERT(instr->IsLdrLiteralX()); |