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Side by Side Diff: src/IceTargetLoweringX8664.cpp

Issue 2097193003: Subzero: Fix x86-64 memory sandboxing. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 4 years, 6 months ago
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1 //===- subzero/src/IceTargetLoweringX8664.cpp - x86-64 lowering -----------===// 1 //===- subzero/src/IceTargetLoweringX8664.cpp - x86-64 lowering -----------===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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401 ZeroReg = Index; 401 ZeroReg = Index;
402 } else { 402 } else {
403 T = Index; 403 T = Index;
404 Shift = Mem->getShift(); 404 Shift = Mem->getShift();
405 } 405 }
406 } 406 }
407 } 407 }
408 408
409 // NeedsLea is a flag indicating whether Mem needs to be materialized to a GPR 409 // NeedsLea is a flag indicating whether Mem needs to be materialized to a GPR
410 // prior to being used. A LEA is needed if Mem.Offset is a constant 410 // prior to being used. A LEA is needed if Mem.Offset is a constant
411 // relocatable, or if Mem.Offset is negative. In both these cases, the LEA is 411 // relocatable with a nonzero offset, or if Mem.Offset is a nonzero immediate;
412 // needed to ensure the sandboxed memory operand will only use the lower 412 // but only when the address mode contains a "user" register other than the
413 // 32-bits of T+Offset. 413 // rsp/rbp/r15 base. In both these cases, the LEA is needed to ensure the
414 // sandboxed memory operand will only use the lower 32-bits of T+Offset.
414 bool NeedsLea = false; 415 bool NeedsLea = false;
415 if (Offset != nullptr) { 416 if (!Mem->getIsRebased()) {
416 if (llvm::isa<ConstantRelocatable>(Offset)) { 417 bool IsOffsetZero = false;
417 NeedsLea = true; 418 if (Offset == nullptr) {
419 IsOffsetZero = true;
420 } else if (const auto *CR = llvm::dyn_cast<ConstantRelocatable>(Offset)) {
421 IsOffsetZero = (CR->getOffset() == 0);
418 } else if (const auto *Imm = llvm::dyn_cast<ConstantInteger32>(Offset)) { 422 } else if (const auto *Imm = llvm::dyn_cast<ConstantInteger32>(Offset)) {
419 NeedsLea = Imm->getValue() < 0; 423 IsOffsetZero = (Imm->getValue() == 0);
420 } else { 424 } else {
421 llvm::report_fatal_error("Unexpected Offset type."); 425 llvm::report_fatal_error("Unexpected Offset type.");
422 } 426 }
427 if (!IsOffsetZero) {
428 if (Base != nullptr && Base != ZeroReg)
429 NeedsLea = true;
430 if (Index != nullptr && Index != ZeroReg)
431 NeedsLea = true;
432 }
423 } 433 }
424 434
425 RegNumT RegNum, RegNum32; 435 RegNumT RegNum, RegNum32;
426 if (T != nullptr) { 436 if (T != nullptr) {
427 if (T->hasReg()) { 437 if (T->hasReg()) {
428 RegNum = Traits::getGprForType(IceType_i64, T->getRegNum()); 438 RegNum = Traits::getGprForType(IceType_i64, T->getRegNum());
429 RegNum32 = Traits::getGprForType(IceType_i32, RegNum); 439 RegNum32 = Traits::getGprForType(IceType_i32, RegNum);
430 // At this point, if T was assigned to rsp/rbp, then we would have already 440 // At this point, if T was assigned to rsp/rbp, then we would have already
431 // made this the ZeroReg. 441 // made this the ZeroReg.
432 assert(RegNum != Traits::RegisterSet::Reg_rsp); 442 assert(RegNum != Traits::RegisterSet::Reg_rsp);
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815 #define X(tag, sizeLog2, align, elts, elty, str, rcstr) \ 825 #define X(tag, sizeLog2, align, elts, elty, str, rcstr) \
816 static_assert(_table1_##tag == _table2_##tag, \ 826 static_assert(_table1_##tag == _table2_##tag, \
817 "Inconsistency between ICETYPEX8664_TABLE and ICETYPE_TABLE"); 827 "Inconsistency between ICETYPEX8664_TABLE and ICETYPE_TABLE");
818 ICETYPE_TABLE 828 ICETYPE_TABLE
819 #undef X 829 #undef X
820 } // end of namespace dummy3 830 } // end of namespace dummy3
821 } // end of anonymous namespace 831 } // end of anonymous namespace
822 832
823 } // end of namespace X8664 833 } // end of namespace X8664
824 } // end of namespace Ice 834 } // end of namespace Ice
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