Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(175)

Side by Side Diff: src/mips/macro-assembler-mips.cc

Issue 2097023002: Reland [heap] Avoid the use of cells to point from code to new-space objects. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: rebase. Created 4 years, 5 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « src/mips/assembler-mips-inl.h ('k') | src/mips64/assembler-mips64.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <limits.h> // For LONG_MIN, LONG_MAX. 5 #include <limits.h> // For LONG_MIN, LONG_MAX.
6 6
7 #if V8_TARGET_ARCH_MIPS 7 #if V8_TARGET_ARCH_MIPS
8 8
9 #include "src/base/bits.h" 9 #include "src/base/bits.h"
10 #include "src/base/division-by-constant.h" 10 #include "src/base/division-by-constant.h"
(...skipping 1455 matching lines...) Expand 10 before | Expand all | Expand 10 after
1466 IsMipsArchVariant(kLoongson)); 1466 IsMipsArchVariant(kLoongson));
1467 mfc1(scratch, fd); 1467 mfc1(scratch, fd);
1468 Usw(scratch, MemOperand(rs.rm(), rs.offset() + Register::kMantissaOffset)); 1468 Usw(scratch, MemOperand(rs.rm(), rs.offset() + Register::kMantissaOffset));
1469 Mfhc1(scratch, fd); 1469 Mfhc1(scratch, fd);
1470 Usw(scratch, MemOperand(rs.rm(), rs.offset() + Register::kExponentOffset)); 1470 Usw(scratch, MemOperand(rs.rm(), rs.offset() + Register::kExponentOffset));
1471 } 1471 }
1472 } 1472 }
1473 1473
1474 1474
1475 void MacroAssembler::li(Register dst, Handle<Object> value, LiFlags mode) { 1475 void MacroAssembler::li(Register dst, Handle<Object> value, LiFlags mode) {
1476 AllowDeferredHandleDereference smi_check; 1476 li(dst, Operand(value), mode);
1477 if (value->IsSmi()) {
1478 li(dst, Operand(value), mode);
1479 } else {
1480 DCHECK(value->IsHeapObject());
1481 if (isolate()->heap()->InNewSpace(*value)) {
1482 Handle<Cell> cell = isolate()->factory()->NewCell(value);
1483 li(dst, Operand(cell));
1484 lw(dst, FieldMemOperand(dst, Cell::kValueOffset));
1485 } else {
1486 li(dst, Operand(value));
1487 }
1488 }
1489 } 1477 }
1490 1478
1491 1479
1492 void MacroAssembler::li(Register rd, Operand j, LiFlags mode) { 1480 void MacroAssembler::li(Register rd, Operand j, LiFlags mode) {
1493 DCHECK(!j.is_reg()); 1481 DCHECK(!j.is_reg());
1494 BlockTrampolinePoolScope block_trampoline_pool(this); 1482 BlockTrampolinePoolScope block_trampoline_pool(this);
1495 if (!MustUseReg(j.rmode_) && mode == OPTIMIZE_SIZE) { 1483 if (!MustUseReg(j.rmode_) && mode == OPTIMIZE_SIZE) {
1496 // Normal load of an immediate value which does not need Relocation Info. 1484 // Normal load of an immediate value which does not need Relocation Info.
1497 if (is_int16(j.imm32_)) { 1485 if (is_int16(j.imm32_)) {
1498 addiu(rd, zero_reg, j.imm32_); 1486 addiu(rd, zero_reg, j.imm32_);
(...skipping 5423 matching lines...) Expand 10 before | Expand all | Expand 10 after
6922 if (mag.shift > 0) sra(result, result, mag.shift); 6910 if (mag.shift > 0) sra(result, result, mag.shift);
6923 srl(at, dividend, 31); 6911 srl(at, dividend, 31);
6924 Addu(result, result, Operand(at)); 6912 Addu(result, result, Operand(at));
6925 } 6913 }
6926 6914
6927 6915
6928 } // namespace internal 6916 } // namespace internal
6929 } // namespace v8 6917 } // namespace v8
6930 6918
6931 #endif // V8_TARGET_ARCH_MIPS 6919 #endif // V8_TARGET_ARCH_MIPS
OLDNEW
« no previous file with comments | « src/mips/assembler-mips-inl.h ('k') | src/mips64/assembler-mips64.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698