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Side by Side Diff: src/IceTargetLoweringMIPS32.h

Issue 2096563004: [Subzero][MIPS32] Implements addEpilog for MIPS32 (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 4 years, 5 months ago
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1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// 1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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227 } 227 }
228 228
229 void _divu(Variable *Dest, Variable *Src0, Variable *Src1) { 229 void _divu(Variable *Dest, Variable *Src0, Variable *Src1) {
230 Context.insert<InstMIPS32Divu>(Dest, Src0, Src1); 230 Context.insert<InstMIPS32Divu>(Dest, Src0, Src1);
231 } 231 }
232 232
233 void _ldc1(Variable *Value, OperandMIPS32Mem *Mem) { 233 void _ldc1(Variable *Value, OperandMIPS32Mem *Mem) {
234 Context.insert<InstMIPS32Ldc1>(Value, Mem); 234 Context.insert<InstMIPS32Ldc1>(Value, Mem);
235 } 235 }
236 236
237 void _lw(Variable *Value, OperandMIPS32Mem *Mem) {
238 Context.insert<InstMIPS32Lw>(Value, Mem);
239 }
240
237 void _lwc1(Variable *Value, OperandMIPS32Mem *Mem) { 241 void _lwc1(Variable *Value, OperandMIPS32Mem *Mem) {
238 Context.insert<InstMIPS32Lwc1>(Value, Mem); 242 Context.insert<InstMIPS32Lwc1>(Value, Mem);
239 } 243 }
240 244
241 void _lui(Variable *Dest, uint32_t Imm) { 245 void _lui(Variable *Dest, uint32_t Imm) {
242 Context.insert<InstMIPS32Lui>(Dest, Imm); 246 Context.insert<InstMIPS32Lui>(Dest, Imm);
243 } 247 }
244 248
245 void _mov(Variable *Dest, Operand *Src0) { 249 void _mov(Variable *Dest, Operand *Src0) {
246 assert(Dest != nullptr); 250 assert(Dest != nullptr);
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548 const SmallBitVector &ExcludeRegisters, 552 const SmallBitVector &ExcludeRegisters,
549 uint64_t Salt) const override; 553 uint64_t Salt) const override;
550 554
551 OperandMIPS32Mem *formMemoryOperand(Operand *Ptr, Type Ty); 555 OperandMIPS32Mem *formMemoryOperand(Operand *Ptr, Type Ty);
552 556
553 bool UsesFramePointer = false; 557 bool UsesFramePointer = false;
554 bool NeedsStackAlignment = false; 558 bool NeedsStackAlignment = false;
555 bool MaybeLeafFunc = true; 559 bool MaybeLeafFunc = true;
556 bool PrologEmitsFixedAllocas = false; 560 bool PrologEmitsFixedAllocas = false;
557 uint32_t MaxOutArgsSizeBytes = 0; 561 uint32_t MaxOutArgsSizeBytes = 0;
562 uint32_t TotalStackSizeBytes = 0;
558 static SmallBitVector TypeToRegisterSet[RCMIPS32_NUM]; 563 static SmallBitVector TypeToRegisterSet[RCMIPS32_NUM];
559 static SmallBitVector TypeToRegisterSetUnfiltered[RCMIPS32_NUM]; 564 static SmallBitVector TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
560 static SmallBitVector RegisterAliases[RegMIPS32::Reg_NUM]; 565 static SmallBitVector RegisterAliases[RegMIPS32::Reg_NUM];
561 SmallBitVector RegsUsed; 566 SmallBitVector RegsUsed;
562 VarList PhysicalRegisters[IceType_NUM]; 567 VarList PhysicalRegisters[IceType_NUM];
563 VarList PreservedGPRs; 568 VarList PreservedGPRs;
564 static constexpr uint32_t CHAR_BITS = 8; 569 static constexpr uint32_t CHAR_BITS = 8;
565 static constexpr uint32_t INT32_BITS = 32; 570 static constexpr uint32_t INT32_BITS = 32;
566 size_t SpillAreaSizeBytes = 0; 571 size_t SpillAreaSizeBytes = 0;
567 size_t FixedAllocaSizeBytes = 0; 572 size_t FixedAllocaSizeBytes = 0;
568 size_t FixedAllocaAlignBytes = 0; 573 size_t FixedAllocaAlignBytes = 0;
574 size_t PreservedRegsSizeBytes = 0;
569 575
570 private: 576 private:
571 ENABLE_MAKE_UNIQUE; 577 ENABLE_MAKE_UNIQUE;
572 578
573 class ComputationTracker { 579 class ComputationTracker {
574 public: 580 public:
575 ComputationTracker() = default; 581 ComputationTracker() = default;
576 ~ComputationTracker() = default; 582 ~ComputationTracker() = default;
577 583
578 void forgetProducers() { KnownComputations.clear(); } 584 void forgetProducers() { KnownComputations.clear(); }
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670 explicit TargetHeaderMIPS32(GlobalContext *Ctx); 676 explicit TargetHeaderMIPS32(GlobalContext *Ctx);
671 677
672 private: 678 private:
673 ~TargetHeaderMIPS32() = default; 679 ~TargetHeaderMIPS32() = default;
674 }; 680 };
675 681
676 } // end of namespace MIPS32 682 } // end of namespace MIPS32
677 } // end of namespace Ice 683 } // end of namespace Ice
678 684
679 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H 685 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H
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