[Subzero][MIPS32] Implements addEpilog for MIPS32

src/IceTargetLoweringMIPS32.cpp

 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost
@@ skipping 772 matching lines @@
   // used registers -- and their aliases. Then, we figure out which GPR
   // registers should be saved.
   SmallBitVector ToPreserve(RegMIPS32::Reg_NUM);
   for (SizeT i = 0; i < CalleeSaves.size(); ++i) {
     if (CalleeSaves[i] && RegsUsed[i]) {
       ToPreserve |= RegisterAliases[i];
     }
   }
 
   uint32_t NumCallee = 0;
-  size_t PreservedRegsSizeBytes = 0;
 
   // RegClasses is a tuple of
   //
   // <First Register in Class, Last Register in Class, Vector of Save Registers>
   //
   // We use this tuple to figure out which register we should save/restore
   // during
   // prolog/epilog.
   using RegClassType = std::tuple<uint32_t, uint32_t, VarList *>;
   const RegClassType RegClass = RegClassType(
@@ skipping 24 matching lines @@
   uint32_t SpillAreaPaddingBytes = 0;
   uint32_t LocalsSlotsPaddingBytes = 0;
   alignStackSpillAreas(PreservedRegsSizeBytes, SpillAreaAlignmentBytes,
                        GlobalsSize, LocalsSlotsAlignmentBytes,
                        &SpillAreaPaddingBytes, &LocalsSlotsPaddingBytes);
   SpillAreaSizeBytes += SpillAreaPaddingBytes + LocalsSlotsPaddingBytes;
   uint32_t GlobalsAndSubsequentPaddingSize =
       GlobalsSize + LocalsSlotsPaddingBytes;
 
   // Adds the out args space to the stack, and align SP if necessary.
-  uint32_t TotalStackSizeBytes = PreservedRegsSizeBytes + SpillAreaSizeBytes +
-                                 FixedAllocaSizeBytes + MaxOutArgsSizeBytes;
+  TotalStackSizeBytes = PreservedRegsSizeBytes + SpillAreaSizeBytes +
+                        FixedAllocaSizeBytes + MaxOutArgsSizeBytes;
 
   // Generate "addiu sp, sp, -TotalStackSizeBytes"
   if (TotalStackSizeBytes) {
     // Use the scratch register if needed to legalize the immediate.
     Variable *SP = getPhysicalRegister(RegMIPS32::Reg_SP);
     _addiu(SP, SP, -(TotalStackSizeBytes));
   }
 
   Ctx->statsUpdateFrameBytes(TotalStackSizeBytes);
 
@@ skipping 69 matching lines @@
         << " spill area alignment = " << SpillAreaAlignmentBytes << " bytes\n"
         << " outgoing args size = " << MaxOutArgsSizeBytes << " bytes\n"
         << " locals spill area alignment = " << LocalsSlotsAlignmentBytes
         << " bytes\n"
         << " is FP based = " << 1 << "\n";
   }
   return;
 }
 
 void TargetMIPS32::addEpilog(CfgNode *Node) {
-  (void)Node;
+  InstList &Insts = Node->getInsts();
+  InstList::reverse_iterator RI, E;
+  for (RI = Insts.rbegin(), E = Insts.rend(); RI != E; ++RI) {
+    if (llvm::isa<InstMIPS32Ret>(*RI))
+      break;
+  }
+  if (RI == E)
+    return;
+
+  // Convert the reverse_iterator position into its corresponding (forward)
+  // iterator position.
+  InstList::iterator InsertPoint = RI.base();
+  --InsertPoint;
+  Context.init(Node);
+  Context.setInsertPoint(InsertPoint);
+
+  Variable *SP = getPhysicalRegister(RegMIPS32::Reg_SP);
+  if (UsesFramePointer) {
+    Variable *FP = getPhysicalRegister(RegMIPS32::Reg_FP);
+    // For late-stage liveness analysis (e.g. asm-verbose mode), adding a fake
+    // use of SP before the assignment of SP=FP keeps previous SP adjustments
+    // from being dead-code eliminated.
+    Context.insert<InstFakeUse>(SP);
+    _mov(SP, FP);
+  }
+
+  VarList::reverse_iterator RIter, END;
+
+  if (!PreservedGPRs.empty()) {
+    uint32_t StackOffset = TotalStackSizeBytes - PreservedRegsSizeBytes;
+    for (RIter = PreservedGPRs.rbegin(), END = PreservedGPRs.rend();
+         RIter != END; ++RIter) {
+      Variable *PhysicalRegister = getPhysicalRegister((*RIter)->getRegNum());
+      Variable *SP = getPhysicalRegister(RegMIPS32::Reg_SP);
+      OperandMIPS32Mem *MemoryLocation = OperandMIPS32Mem::create(
+          Func, IceType_i32, SP,
+          llvm::cast<ConstantInteger32>(Ctx->getConstantInt32(StackOffset)));
+      _lw(PhysicalRegister, MemoryLocation);
+      StackOffset += typeWidthInBytesOnStack(PhysicalRegister->getType());
+    }
+  }
+
+  if (TotalStackSizeBytes) {
+    _addiu(SP, SP, TotalStackSizeBytes);
+  }
+
   return;
-  UnimplementedError(getFlags());
 }
 
 Operand *TargetMIPS32::loOperand(Operand *Operand) {
   assert(Operand->getType() == IceType_i64);
   if (auto *Var64On32 = llvm::dyn_cast<Variable64On32>(Operand))
     return Var64On32->getLo();
   if (auto *Const = llvm::dyn_cast<ConstantInteger64>(Operand)) {
     return Ctx->getConstantInt32(static_cast<uint32_t>(Const->getValue()));
   }
   if (auto *Mem = llvm::dyn_cast<OperandMIPS32Mem>(Operand)) {
@@ skipping 1343 matching lines @@
   Str << "\t.set\t"
       << "nomips16\n";
 }
 
 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM];
 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
 
 } // end of namespace MIPS32
 } // end of namespace Ice