Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(232)

Side by Side Diff: src/IceInstMIPS32.h

Issue 2096563004: [Subzero][MIPS32] Implements addEpilog for MIPS32 (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 4 years, 6 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « no previous file | src/IceInstMIPS32.cpp » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-=== // 1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-=== //
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
(...skipping 718 matching lines...) Expand 10 before | Expand all | Expand 10 after
729 using InstMIPS32Cvt_s_d = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_s_d>; 729 using InstMIPS32Cvt_s_d = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_s_d>;
730 using InstMIPS32Cvt_s_l = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_s_l>; 730 using InstMIPS32Cvt_s_l = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_s_l>;
731 using InstMIPS32Cvt_s_w = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_s_w>; 731 using InstMIPS32Cvt_s_w = InstMIPS32TwoAddrFPR<InstMIPS32::Cvt_s_w>;
732 using InstMIPS32Div = InstMIPS32ThreeAddrGPR<InstMIPS32::Div>; 732 using InstMIPS32Div = InstMIPS32ThreeAddrGPR<InstMIPS32::Div>;
733 using InstMIPS32Div_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Div_d>; 733 using InstMIPS32Div_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Div_d>;
734 using InstMIPS32Div_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Div_s>; 734 using InstMIPS32Div_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Div_s>;
735 using InstMIPS32Divu = InstMIPS32ThreeAddrGPR<InstMIPS32::Divu>; 735 using InstMIPS32Divu = InstMIPS32ThreeAddrGPR<InstMIPS32::Divu>;
736 using InstMIPS32La = InstMIPS32UnaryopGPR<InstMIPS32::La>; 736 using InstMIPS32La = InstMIPS32UnaryopGPR<InstMIPS32::La>;
737 using InstMIPS32Ldc1 = InstMIPS32Memory<InstMIPS32::Ldc1>; 737 using InstMIPS32Ldc1 = InstMIPS32Memory<InstMIPS32::Ldc1>;
738 using InstMIPS32Lui = InstMIPS32Imm16<InstMIPS32::Lui>; 738 using InstMIPS32Lui = InstMIPS32Imm16<InstMIPS32::Lui>;
739 using InstMIPS32Lw = InstMIPS32Memory<InstMIPS32::Lwc1>; 739 using InstMIPS32Lw = InstMIPS32Memory<InstMIPS32::Lw>;
740 using InstMIPS32Lwc1 = InstMIPS32Memory<InstMIPS32::Lwc1>; 740 using InstMIPS32Lwc1 = InstMIPS32Memory<InstMIPS32::Lwc1>;
741 using InstMIPS32Mfc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mfc1>; 741 using InstMIPS32Mfc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mfc1>;
742 using InstMIPS32Mfhi = InstMIPS32UnaryopGPR<InstMIPS32::Mfhi>; 742 using InstMIPS32Mfhi = InstMIPS32UnaryopGPR<InstMIPS32::Mfhi>;
743 using InstMIPS32Mflo = InstMIPS32UnaryopGPR<InstMIPS32::Mflo>; 743 using InstMIPS32Mflo = InstMIPS32UnaryopGPR<InstMIPS32::Mflo>;
744 using InstMIPS32Mov_d = InstMIPS32TwoAddrFPR<InstMIPS32::Mov_d>; 744 using InstMIPS32Mov_d = InstMIPS32TwoAddrFPR<InstMIPS32::Mov_d>;
745 using InstMIPS32Mov_s = InstMIPS32TwoAddrFPR<InstMIPS32::Mov_s>; 745 using InstMIPS32Mov_s = InstMIPS32TwoAddrFPR<InstMIPS32::Mov_s>;
746 using InstMIPS32Mtc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mtc1>; 746 using InstMIPS32Mtc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mtc1>;
747 using InstMIPS32Mthi = InstMIPS32UnaryopGPR<InstMIPS32::Mthi>; 747 using InstMIPS32Mthi = InstMIPS32UnaryopGPR<InstMIPS32::Mthi>;
748 using InstMIPS32Mtlo = InstMIPS32UnaryopGPR<InstMIPS32::Mtlo>; 748 using InstMIPS32Mtlo = InstMIPS32UnaryopGPR<InstMIPS32::Mtlo>;
749 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>; 749 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>;
(...skipping 75 matching lines...) Expand 10 before | Expand all | Expand 10 after
825 template <> void InstMIPS32Mfhi::emit(const Cfg *Func) const; 825 template <> void InstMIPS32Mfhi::emit(const Cfg *Func) const;
826 template <> void InstMIPS32Mtlo::emit(const Cfg *Func) const; 826 template <> void InstMIPS32Mtlo::emit(const Cfg *Func) const;
827 template <> void InstMIPS32Mthi::emit(const Cfg *Func) const; 827 template <> void InstMIPS32Mthi::emit(const Cfg *Func) const;
828 template <> void InstMIPS32Mult::emit(const Cfg *Func) const; 828 template <> void InstMIPS32Mult::emit(const Cfg *Func) const;
829 template <> void InstMIPS32Multu::emit(const Cfg *Func) const; 829 template <> void InstMIPS32Multu::emit(const Cfg *Func) const;
830 830
831 } // end of namespace MIPS32 831 } // end of namespace MIPS32
832 } // end of namespace Ice 832 } // end of namespace Ice
833 833
834 #endif // SUBZERO_SRC_ICEINSTMIPS32_H 834 #endif // SUBZERO_SRC_ICEINSTMIPS32_H
OLDNEW
« no previous file with comments | « no previous file | src/IceInstMIPS32.cpp » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698