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Issue 2092413002: [RegisterConfiguration] Streamline access to arch defaults, simplify Registers. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fix compile. Created 4 years, 5 months ago
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1 // Copyright 2015 the V8 project authors. All rights reserved. 1 // Copyright 2015 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/assembler.h" 5 #include "src/assembler.h"
6 #include "src/codegen.h" 6 #include "src/codegen.h"
7 #include "src/compiler/linkage.h" 7 #include "src/compiler/linkage.h"
8 #include "src/compiler/raw-machine-assembler.h" 8 #include "src/compiler/raw-machine-assembler.h"
9 #include "src/machine-type.h" 9 #include "src/machine-type.h"
10 #include "src/register-configuration.h" 10 #include "src/register-configuration.h"
11 11
12 #include "test/cctest/cctest.h" 12 #include "test/cctest/cctest.h"
13 #include "test/cctest/compiler/codegen-tester.h" 13 #include "test/cctest/compiler/codegen-tester.h"
14 #include "test/cctest/compiler/graph-builder-tester.h" 14 #include "test/cctest/compiler/graph-builder-tester.h"
15 #include "test/cctest/compiler/value-helper.h" 15 #include "test/cctest/compiler/value-helper.h"
16 16
17 namespace v8 { 17 namespace v8 {
18 namespace internal { 18 namespace internal {
19 namespace compiler { 19 namespace compiler {
20 20
21 const auto GetRegConfig = RegisterConfiguration::Turbofan;
22
21 namespace { 23 namespace {
22 typedef float float32; 24 typedef float float32;
23 typedef double float64; 25 typedef double float64;
24 26
25 // Picks a representative pair of integers from the given range. 27 // Picks a representative pair of integers from the given range.
26 // If there are less than {max_pairs} possible pairs, do them all, otherwise try 28 // If there are less than {max_pairs} possible pairs, do them all, otherwise try
27 // to select a representative set. 29 // to select a representative set.
28 class Pairs { 30 class Pairs {
29 public: 31 public:
30 Pairs(int max_pairs, int range, const int* codes) 32 Pairs(int max_pairs, int range, const int* codes)
(...skipping 38 matching lines...) Expand 10 before | Expand all | Expand 10 after
69 int max_pairs_; 71 int max_pairs_;
70 int counter_; 72 int counter_;
71 bool exhaustive() { return max_pairs_ == (range_ * range_); } 73 bool exhaustive() { return max_pairs_ == (range_ * range_); }
72 }; 74 };
73 75
74 76
75 // Pairs of general purpose registers. 77 // Pairs of general purpose registers.
76 class RegisterPairs : public Pairs { 78 class RegisterPairs : public Pairs {
77 public: 79 public:
78 RegisterPairs() 80 RegisterPairs()
79 : Pairs( 81 : Pairs(100, GetRegConfig()->num_allocatable_general_registers(),
80 100, 82 GetRegConfig()->allocatable_general_codes()) {}
81 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
82 ->num_allocatable_general_registers(),
83 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
84 ->allocatable_general_codes()) {}
85 }; 83 };
86 84
87 85
88 // Pairs of double registers. 86 // Pairs of double registers.
89 class Float32RegisterPairs : public Pairs { 87 class Float32RegisterPairs : public Pairs {
90 public: 88 public:
91 Float32RegisterPairs() 89 Float32RegisterPairs()
92 : Pairs( 90 : Pairs(
93 100, 91 100,
94 #if V8_TARGET_ARCH_ARM 92 #if V8_TARGET_ARCH_ARM
95 // TODO(bbudge) Modify wasm linkage to allow use of all float regs. 93 // TODO(bbudge) Modify wasm linkage to allow use of all float regs.
96 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN) 94 GetRegConfig()->num_allocatable_double_registers() / 2 - 2,
97 ->num_allocatable_double_registers() /
98 2 -
99 2,
100 #else 95 #else
101 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN) 96 GetRegConfig()->num_allocatable_double_registers(),
102 ->num_allocatable_double_registers(),
103 #endif 97 #endif
104 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN) 98 GetRegConfig()->allocatable_double_codes()) {
105 ->allocatable_double_codes()) {
106 } 99 }
107 }; 100 };
108 101
109 102
110 // Pairs of double registers. 103 // Pairs of double registers.
111 class Float64RegisterPairs : public Pairs { 104 class Float64RegisterPairs : public Pairs {
112 public: 105 public:
113 Float64RegisterPairs() 106 Float64RegisterPairs()
114 : Pairs( 107 : Pairs(100, GetRegConfig()->num_allocatable_double_registers(),
115 100, 108 GetRegConfig()->allocatable_double_codes()) {}
116 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
117 ->num_allocatable_double_registers(),
118 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
119 ->allocatable_double_codes()) {}
120 }; 109 };
121 110
122 111
123 // Helper for allocating either an GP or FP reg, or the next stack slot. 112 // Helper for allocating either an GP or FP reg, or the next stack slot.
124 struct Allocator { 113 struct Allocator {
125 Allocator(int* gp, int gpc, int* fp, int fpc) 114 Allocator(int* gp, int gpc, int* fp, int fpc)
126 : gp_count(gpc), 115 : gp_count(gpc),
127 gp_offset(0), 116 gp_offset(0),
128 gp_regs(gp), 117 gp_regs(gp),
129 fp_count(fpc), 118 fp_count(fpc),
(...skipping 510 matching lines...) Expand 10 before | Expand all | Expand 10 after
640 Allocator params(parray, 2, nullptr, 0); 629 Allocator params(parray, 2, nullptr, 0);
641 Allocator rets(rarray, 1, nullptr, 0); 630 Allocator rets(rarray, 1, nullptr, 0);
642 RegisterConfig config(params, rets); 631 RegisterConfig config(params, rets);
643 CallDescriptor* desc = config.Create(&zone, &sig); 632 CallDescriptor* desc = config.Create(&zone, &sig);
644 TestInt32Sub(desc); 633 TestInt32Sub(desc);
645 } 634 }
646 } 635 }
647 636
648 637
649 // Separate tests for parallelization. 638 // Separate tests for parallelization.
650 #define TEST_INT32_SUB_WITH_RET(x) \ 639 #define TEST_INT32_SUB_WITH_RET(x) \
651 TEST(Run_Int32Sub_all_allocatable_pairs_##x) { \ 640 TEST(Run_Int32Sub_all_allocatable_pairs_##x) { \
652 if (x < Register::kNumRegisters && \ 641 if (x < Register::kNumRegisters && \
653 Register::from_code(x).IsAllocatable()) { \ 642 GetRegConfig()->IsAllocatableGeneralCode(x)) { \
654 Test_RunInt32SubWithRet(x); \ 643 Test_RunInt32SubWithRet(x); \
655 } \ 644 } \
656 } 645 }
657 646
658
659 TEST_INT32_SUB_WITH_RET(0) 647 TEST_INT32_SUB_WITH_RET(0)
660 TEST_INT32_SUB_WITH_RET(1) 648 TEST_INT32_SUB_WITH_RET(1)
661 TEST_INT32_SUB_WITH_RET(2) 649 TEST_INT32_SUB_WITH_RET(2)
662 TEST_INT32_SUB_WITH_RET(3) 650 TEST_INT32_SUB_WITH_RET(3)
663 TEST_INT32_SUB_WITH_RET(4) 651 TEST_INT32_SUB_WITH_RET(4)
664 TEST_INT32_SUB_WITH_RET(5) 652 TEST_INT32_SUB_WITH_RET(5)
665 TEST_INT32_SUB_WITH_RET(6) 653 TEST_INT32_SUB_WITH_RET(6)
666 TEST_INT32_SUB_WITH_RET(7) 654 TEST_INT32_SUB_WITH_RET(7)
667 TEST_INT32_SUB_WITH_RET(8) 655 TEST_INT32_SUB_WITH_RET(8)
668 TEST_INT32_SUB_WITH_RET(9) 656 TEST_INT32_SUB_WITH_RET(9)
(...skipping 27 matching lines...) Expand all
696 } 684 }
697 685
698 686
699 TEST(Run_CopyTwentyInt32_all_allocatable_pairs) { 687 TEST(Run_CopyTwentyInt32_all_allocatable_pairs) {
700 Int32Signature sig(20); 688 Int32Signature sig(20);
701 RegisterPairs pairs; 689 RegisterPairs pairs;
702 while (pairs.More()) { 690 while (pairs.More()) {
703 base::AccountingAllocator allocator; 691 base::AccountingAllocator allocator;
704 Zone zone(&allocator); 692 Zone zone(&allocator);
705 int parray[2]; 693 int parray[2];
706 int rarray[] = { 694 int rarray[] = {GetRegConfig()->GetAllocatableGeneralCode(0)};
707 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
708 ->GetAllocatableGeneralCode(0)};
709 pairs.Next(&parray[0], &parray[1], false); 695 pairs.Next(&parray[0], &parray[1], false);
710 Allocator params(parray, 2, nullptr, 0); 696 Allocator params(parray, 2, nullptr, 0);
711 Allocator rets(rarray, 1, nullptr, 0); 697 Allocator rets(rarray, 1, nullptr, 0);
712 RegisterConfig config(params, rets); 698 RegisterConfig config(params, rets);
713 CallDescriptor* desc = config.Create(&zone, &sig); 699 CallDescriptor* desc = config.Create(&zone, &sig);
714 CopyTwentyInt32(desc); 700 CopyTwentyInt32(desc);
715 } 701 }
716 } 702 }
717 703
718 704
(...skipping 26 matching lines...) Expand all
745 for (int i = 0; i < ParamCount(desc); i++) { 731 for (int i = 0; i < ParamCount(desc); i++) {
746 result += static_cast<uint32_t>(input[i]) * coeff[i]; 732 result += static_cast<uint32_t>(input[i]) * coeff[i];
747 } 733 }
748 return static_cast<int32_t>(result); 734 return static_cast<int32_t>(result);
749 } 735 }
750 736
751 737
752 static void Test_Int32_WeightedSum_of_size(int count) { 738 static void Test_Int32_WeightedSum_of_size(int count) {
753 Int32Signature sig(count); 739 Int32Signature sig(count);
754 for (int p0 = 0; p0 < Register::kNumRegisters; p0++) { 740 for (int p0 = 0; p0 < Register::kNumRegisters; p0++) {
755 if (Register::from_code(p0).IsAllocatable()) { 741 if (GetRegConfig()->IsAllocatableGeneralCode(p0)) {
756 base::AccountingAllocator allocator; 742 base::AccountingAllocator allocator;
757 Zone zone(&allocator); 743 Zone zone(&allocator);
758 744
759 int parray[] = {p0}; 745 int parray[] = {p0};
760 int rarray[] = { 746 int rarray[] = {GetRegConfig()->GetAllocatableGeneralCode(0)};
761 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
762 ->GetAllocatableGeneralCode(0)};
763 Allocator params(parray, 1, nullptr, 0); 747 Allocator params(parray, 1, nullptr, 0);
764 Allocator rets(rarray, 1, nullptr, 0); 748 Allocator rets(rarray, 1, nullptr, 0);
765 RegisterConfig config(params, rets); 749 RegisterConfig config(params, rets);
766 CallDescriptor* desc = config.Create(&zone, &sig); 750 CallDescriptor* desc = config.Create(&zone, &sig);
767 Run_Computation<int32_t>(desc, Build_Int32_WeightedSum, 751 Run_Computation<int32_t>(desc, Build_Int32_WeightedSum,
768 Compute_Int32_WeightedSum, 257 + count); 752 Compute_Int32_WeightedSum, 257 + count);
769 } 753 }
770 } 754 }
771 } 755 }
772 756
(...skipping 32 matching lines...) Expand 10 before | Expand all | Expand 10 after
805 int count = ParamCount(desc); 789 int count = ParamCount(desc);
806 if (count <= which) return; 790 if (count <= which) return;
807 Run_Computation<CType>(desc, Build_Select<which>, 791 Run_Computation<CType>(desc, Build_Select<which>,
808 Compute_Select<CType, which>, 792 Compute_Select<CType, which>,
809 1044 + which + 3 * sizeof(CType)); 793 1044 + which + 3 * sizeof(CType));
810 } 794 }
811 795
812 796
813 template <int which> 797 template <int which>
814 void Test_Int32_Select() { 798 void Test_Int32_Select() {
815 int parray[] = { 799 int parray[] = {GetRegConfig()->GetAllocatableGeneralCode(0)};
816 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN) 800 int rarray[] = {GetRegConfig()->GetAllocatableGeneralCode(0)};
817 ->GetAllocatableGeneralCode(0)};
818 int rarray[] = {
819 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
820 ->GetAllocatableGeneralCode(0)};
821 Allocator params(parray, 1, nullptr, 0); 801 Allocator params(parray, 1, nullptr, 0);
822 Allocator rets(rarray, 1, nullptr, 0); 802 Allocator rets(rarray, 1, nullptr, 0);
823 RegisterConfig config(params, rets); 803 RegisterConfig config(params, rets);
824 804
825 base::AccountingAllocator allocator; 805 base::AccountingAllocator allocator;
826 Zone zone(&allocator); 806 Zone zone(&allocator);
827 807
828 for (int i = which + 1; i <= 64; i++) { 808 for (int i = which + 1; i <= 64; i++) {
829 Int32Signature sig(i); 809 Int32Signature sig(i);
830 CallDescriptor* desc = config.Create(&zone, &sig); 810 CallDescriptor* desc = config.Create(&zone, &sig);
(...skipping 16 matching lines...) Expand all
847 TEST_INT32_SELECT(6) 827 TEST_INT32_SELECT(6)
848 TEST_INT32_SELECT(11) 828 TEST_INT32_SELECT(11)
849 TEST_INT32_SELECT(15) 829 TEST_INT32_SELECT(15)
850 TEST_INT32_SELECT(19) 830 TEST_INT32_SELECT(19)
851 TEST_INT32_SELECT(45) 831 TEST_INT32_SELECT(45)
852 TEST_INT32_SELECT(62) 832 TEST_INT32_SELECT(62)
853 TEST_INT32_SELECT(63) 833 TEST_INT32_SELECT(63)
854 834
855 835
856 TEST(Int64Select_registers) { 836 TEST(Int64Select_registers) {
857 if (RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN) 837 if (GetRegConfig()->num_allocatable_general_registers() < 2) return;
858 ->num_allocatable_general_registers() < 2)
859 return;
860 if (kPointerSize < 8) return; // TODO(titzer): int64 on 32-bit platforms 838 if (kPointerSize < 8) return; // TODO(titzer): int64 on 32-bit platforms
861 839
862 int rarray[] = { 840 int rarray[] = {GetRegConfig()->GetAllocatableGeneralCode(0)};
863 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
864 ->GetAllocatableGeneralCode(0)};
865 ArgsBuffer<int64_t>::Sig sig(2); 841 ArgsBuffer<int64_t>::Sig sig(2);
866 842
867 RegisterPairs pairs; 843 RegisterPairs pairs;
868 base::AccountingAllocator allocator; 844 base::AccountingAllocator allocator;
869 Zone zone(&allocator); 845 Zone zone(&allocator);
870 while (pairs.More()) { 846 while (pairs.More()) {
871 int parray[2]; 847 int parray[2];
872 pairs.Next(&parray[0], &parray[1], false); 848 pairs.Next(&parray[0], &parray[1], false);
873 Allocator params(parray, 2, nullptr, 0); 849 Allocator params(parray, 2, nullptr, 0);
874 Allocator rets(rarray, 1, nullptr, 0); 850 Allocator rets(rarray, 1, nullptr, 0);
875 RegisterConfig config(params, rets); 851 RegisterConfig config(params, rets);
876 852
877 CallDescriptor* desc = config.Create(&zone, &sig); 853 CallDescriptor* desc = config.Create(&zone, &sig);
878 RunSelect<int64_t, 0>(desc); 854 RunSelect<int64_t, 0>(desc);
879 RunSelect<int64_t, 1>(desc); 855 RunSelect<int64_t, 1>(desc);
880 } 856 }
881 } 857 }
882 858
883 859
884 TEST(Float32Select_registers) { 860 TEST(Float32Select_registers) {
885 if (RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN) 861 if (GetRegConfig()->num_allocatable_double_registers() < 2) {
886 ->num_allocatable_double_registers() < 2) {
887 return; 862 return;
888 } 863 }
889 864
890 int rarray[] = { 865 int rarray[] = {GetRegConfig()->GetAllocatableDoubleCode(0)};
891 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
892 ->GetAllocatableDoubleCode(0)};
893 ArgsBuffer<float32>::Sig sig(2); 866 ArgsBuffer<float32>::Sig sig(2);
894 867
895 Float32RegisterPairs pairs; 868 Float32RegisterPairs pairs;
896 base::AccountingAllocator allocator; 869 base::AccountingAllocator allocator;
897 Zone zone(&allocator); 870 Zone zone(&allocator);
898 while (pairs.More()) { 871 while (pairs.More()) {
899 int parray[2]; 872 int parray[2];
900 pairs.Next(&parray[0], &parray[1], false); 873 pairs.Next(&parray[0], &parray[1], false);
901 Allocator params(nullptr, 0, parray, 2); 874 Allocator params(nullptr, 0, parray, 2);
902 Allocator rets(nullptr, 0, rarray, 1); 875 Allocator rets(nullptr, 0, rarray, 1);
903 RegisterConfig config(params, rets); 876 RegisterConfig config(params, rets);
904 877
905 CallDescriptor* desc = config.Create(&zone, &sig); 878 CallDescriptor* desc = config.Create(&zone, &sig);
906 RunSelect<float32, 0>(desc); 879 RunSelect<float32, 0>(desc);
907 RunSelect<float32, 1>(desc); 880 RunSelect<float32, 1>(desc);
908 } 881 }
909 } 882 }
910 883
911 884
912 TEST(Float64Select_registers) { 885 TEST(Float64Select_registers) {
913 if (RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN) 886 if (GetRegConfig()->num_allocatable_double_registers() < 2) return;
914 ->num_allocatable_double_registers() < 2) 887 if (GetRegConfig()->num_allocatable_general_registers() < 2) return;
915 return; 888 int rarray[] = {GetRegConfig()->GetAllocatableDoubleCode(0)};
916 if (RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
917 ->num_allocatable_general_registers() < 2)
918 return;
919 int rarray[] = {
920 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
921 ->GetAllocatableDoubleCode(0)};
922 ArgsBuffer<float64>::Sig sig(2); 889 ArgsBuffer<float64>::Sig sig(2);
923 890
924 Float64RegisterPairs pairs; 891 Float64RegisterPairs pairs;
925 base::AccountingAllocator allocator; 892 base::AccountingAllocator allocator;
926 Zone zone(&allocator); 893 Zone zone(&allocator);
927 while (pairs.More()) { 894 while (pairs.More()) {
928 int parray[2]; 895 int parray[2];
929 pairs.Next(&parray[0], &parray[1], false); 896 pairs.Next(&parray[0], &parray[1], false);
930 Allocator params(nullptr, 0, parray, 2); 897 Allocator params(nullptr, 0, parray, 2);
931 Allocator rets(nullptr, 0, rarray, 1); 898 Allocator rets(nullptr, 0, rarray, 1);
932 RegisterConfig config(params, rets); 899 RegisterConfig config(params, rets);
933 900
934 CallDescriptor* desc = config.Create(&zone, &sig); 901 CallDescriptor* desc = config.Create(&zone, &sig);
935 RunSelect<float64, 0>(desc); 902 RunSelect<float64, 0>(desc);
936 RunSelect<float64, 1>(desc); 903 RunSelect<float64, 1>(desc);
937 } 904 }
938 } 905 }
939 906
940 907
941 TEST(Float32Select_stack_params_return_reg) { 908 TEST(Float32Select_stack_params_return_reg) {
942 int rarray[] = { 909 int rarray[] = {GetRegConfig()->GetAllocatableDoubleCode(0)};
943 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
944 ->GetAllocatableDoubleCode(0)};
945 Allocator params(nullptr, 0, nullptr, 0); 910 Allocator params(nullptr, 0, nullptr, 0);
946 Allocator rets(nullptr, 0, rarray, 1); 911 Allocator rets(nullptr, 0, rarray, 1);
947 RegisterConfig config(params, rets); 912 RegisterConfig config(params, rets);
948 913
949 base::AccountingAllocator allocator; 914 base::AccountingAllocator allocator;
950 Zone zone(&allocator); 915 Zone zone(&allocator);
951 for (int count = 1; count < 6; count++) { 916 for (int count = 1; count < 6; count++) {
952 ArgsBuffer<float32>::Sig sig(count); 917 ArgsBuffer<float32>::Sig sig(count);
953 CallDescriptor* desc = config.Create(&zone, &sig); 918 CallDescriptor* desc = config.Create(&zone, &sig);
954 RunSelect<float32, 0>(desc); 919 RunSelect<float32, 0>(desc);
955 RunSelect<float32, 1>(desc); 920 RunSelect<float32, 1>(desc);
956 RunSelect<float32, 2>(desc); 921 RunSelect<float32, 2>(desc);
957 RunSelect<float32, 3>(desc); 922 RunSelect<float32, 3>(desc);
958 RunSelect<float32, 4>(desc); 923 RunSelect<float32, 4>(desc);
959 RunSelect<float32, 5>(desc); 924 RunSelect<float32, 5>(desc);
960 } 925 }
961 } 926 }
962 927
963 928
964 TEST(Float64Select_stack_params_return_reg) { 929 TEST(Float64Select_stack_params_return_reg) {
965 int rarray[] = { 930 int rarray[] = {GetRegConfig()->GetAllocatableDoubleCode(0)};
966 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
967 ->GetAllocatableDoubleCode(0)};
968 Allocator params(nullptr, 0, nullptr, 0); 931 Allocator params(nullptr, 0, nullptr, 0);
969 Allocator rets(nullptr, 0, rarray, 1); 932 Allocator rets(nullptr, 0, rarray, 1);
970 RegisterConfig config(params, rets); 933 RegisterConfig config(params, rets);
971 934
972 base::AccountingAllocator allocator; 935 base::AccountingAllocator allocator;
973 Zone zone(&allocator); 936 Zone zone(&allocator);
974 for (int count = 1; count < 6; count++) { 937 for (int count = 1; count < 6; count++) {
975 ArgsBuffer<float64>::Sig sig(count); 938 ArgsBuffer<float64>::Sig sig(count);
976 CallDescriptor* desc = config.Create(&zone, &sig); 939 CallDescriptor* desc = config.Create(&zone, &sig);
977 RunSelect<float64, 0>(desc); 940 RunSelect<float64, 0>(desc);
(...skipping 32 matching lines...) Expand 10 before | Expand all | Expand 10 after
1010 args[i] = raw.Parameter(i); 973 args[i] = raw.Parameter(i);
1011 } 974 }
1012 975
1013 Node* call = raw.CallN(desc, target, args); 976 Node* call = raw.CallN(desc, target, args);
1014 raw.Return(call); 977 raw.Return(call);
1015 } 978 }
1016 } 979 }
1017 980
1018 981
1019 TEST(Float64StackParamsToStackParams) { 982 TEST(Float64StackParamsToStackParams) {
1020 int rarray[] = { 983 int rarray[] = {GetRegConfig()->GetAllocatableDoubleCode(0)};
1021 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
1022 ->GetAllocatableDoubleCode(0)};
1023 Allocator params(nullptr, 0, nullptr, 0); 984 Allocator params(nullptr, 0, nullptr, 0);
1024 Allocator rets(nullptr, 0, rarray, 1); 985 Allocator rets(nullptr, 0, rarray, 1);
1025 986
1026 base::AccountingAllocator allocator; 987 base::AccountingAllocator allocator;
1027 Zone zone(&allocator); 988 Zone zone(&allocator);
1028 ArgsBuffer<float64>::Sig sig(2); 989 ArgsBuffer<float64>::Sig sig(2);
1029 RegisterConfig config(params, rets); 990 RegisterConfig config(params, rets);
1030 CallDescriptor* desc = config.Create(&zone, &sig); 991 CallDescriptor* desc = config.Create(&zone, &sig);
1031 992
1032 Run_Computation<float64>(desc, Build_Select_With_Call<float64, 0>, 993 Run_Computation<float64>(desc, Build_Select_With_Call<float64, 0>,
1033 Compute_Select<float64, 0>, 1098); 994 Compute_Select<float64, 0>, 1098);
1034 995
1035 Run_Computation<float64>(desc, Build_Select_With_Call<float64, 1>, 996 Run_Computation<float64>(desc, Build_Select_With_Call<float64, 1>,
1036 Compute_Select<float64, 1>, 1099); 997 Compute_Select<float64, 1>, 1099);
1037 } 998 }
1038 999
1039 1000
1040 void MixedParamTest(int start) { 1001 void MixedParamTest(int start) {
1041 if (RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN) 1002 if (GetRegConfig()->num_double_registers() < 2) return;
1042 ->num_double_registers() < 2)
1043 return;
1044 1003
1045 // TODO(titzer): mix in 64-bit types on all platforms when supported. 1004 // TODO(titzer): mix in 64-bit types on all platforms when supported.
1046 #if V8_TARGET_ARCH_32_BIT 1005 #if V8_TARGET_ARCH_32_BIT
1047 static MachineType types[] = { 1006 static MachineType types[] = {
1048 MachineType::Int32(), MachineType::Float32(), MachineType::Float64(), 1007 MachineType::Int32(), MachineType::Float32(), MachineType::Float64(),
1049 MachineType::Int32(), MachineType::Float64(), MachineType::Float32(), 1008 MachineType::Int32(), MachineType::Float64(), MachineType::Float32(),
1050 MachineType::Float32(), MachineType::Float64(), MachineType::Int32(), 1009 MachineType::Float32(), MachineType::Float64(), MachineType::Int32(),
1051 MachineType::Float32(), MachineType::Int32(), MachineType::Float64(), 1010 MachineType::Float32(), MachineType::Int32(), MachineType::Float64(),
1052 MachineType::Float64(), MachineType::Float32(), MachineType::Int32(), 1011 MachineType::Float64(), MachineType::Float32(), MachineType::Int32(),
1053 MachineType::Float64(), MachineType::Int32(), MachineType::Float32()}; 1012 MachineType::Float64(), MachineType::Int32(), MachineType::Float32()};
1054 #else 1013 #else
1055 static MachineType types[] = { 1014 static MachineType types[] = {
1056 MachineType::Int32(), MachineType::Int64(), MachineType::Float32(), 1015 MachineType::Int32(), MachineType::Int64(), MachineType::Float32(),
1057 MachineType::Float64(), MachineType::Int32(), MachineType::Float64(), 1016 MachineType::Float64(), MachineType::Int32(), MachineType::Float64(),
1058 MachineType::Float32(), MachineType::Int64(), MachineType::Int64(), 1017 MachineType::Float32(), MachineType::Int64(), MachineType::Int64(),
1059 MachineType::Float32(), MachineType::Float32(), MachineType::Int32(), 1018 MachineType::Float32(), MachineType::Float32(), MachineType::Int32(),
1060 MachineType::Float64(), MachineType::Float64(), MachineType::Int64(), 1019 MachineType::Float64(), MachineType::Float64(), MachineType::Int64(),
1061 MachineType::Int32(), MachineType::Float64(), MachineType::Int32(), 1020 MachineType::Int32(), MachineType::Float64(), MachineType::Int32(),
1062 MachineType::Float32()}; 1021 MachineType::Float32()};
1063 #endif 1022 #endif
1064 1023
1065 Isolate* isolate = CcTest::InitIsolateOnce(); 1024 Isolate* isolate = CcTest::InitIsolateOnce();
1066 1025
1067 // Build machine signature 1026 // Build machine signature
1068 MachineType* params = &types[start]; 1027 MachineType* params = &types[start];
1069 const int num_params = static_cast<int>(arraysize(types) - start); 1028 const int num_params = static_cast<int>(arraysize(types) - start);
1070 1029
1071 // Build call descriptor 1030 // Build call descriptor
1072 int parray_gp[] = { 1031 int parray_gp[] = {GetRegConfig()->GetAllocatableGeneralCode(0),
1073 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN) 1032 GetRegConfig()->GetAllocatableGeneralCode(1)};
1074 ->GetAllocatableGeneralCode(0), 1033 int rarray_gp[] = {GetRegConfig()->GetAllocatableGeneralCode(0)};
1075 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN) 1034 int parray_fp[] = {GetRegConfig()->GetAllocatableDoubleCode(0),
1076 ->GetAllocatableGeneralCode(1)}; 1035 GetRegConfig()->GetAllocatableDoubleCode(1)};
1077 int rarray_gp[] = { 1036 int rarray_fp[] = {GetRegConfig()->GetAllocatableDoubleCode(0)};
1078 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
1079 ->GetAllocatableGeneralCode(0)};
1080 int parray_fp[] = {
1081 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
1082 ->GetAllocatableDoubleCode(0),
1083 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
1084 ->GetAllocatableDoubleCode(1)};
1085 int rarray_fp[] = {
1086 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
1087 ->GetAllocatableDoubleCode(0)};
1088 Allocator palloc(parray_gp, 2, parray_fp, 2); 1037 Allocator palloc(parray_gp, 2, parray_fp, 2);
1089 Allocator ralloc(rarray_gp, 1, rarray_fp, 1); 1038 Allocator ralloc(rarray_gp, 1, rarray_fp, 1);
1090 RegisterConfig config(palloc, ralloc); 1039 RegisterConfig config(palloc, ralloc);
1091 1040
1092 for (int which = 0; which < num_params; which++) { 1041 for (int which = 0; which < num_params; which++) {
1093 base::AccountingAllocator allocator; 1042 base::AccountingAllocator allocator;
1094 Zone zone(&allocator); 1043 Zone zone(&allocator);
1095 HandleScope scope(isolate); 1044 HandleScope scope(isolate);
1096 MachineSignature::Builder builder(&zone, 1, num_params); 1045 MachineSignature::Builder builder(&zone, 1, num_params);
1097 builder.AddReturn(params[which]); 1046 builder.AddReturn(params[which]);
(...skipping 80 matching lines...) Expand 10 before | Expand all | Expand 10 after
1178 TEST(MixedParams_0) { MixedParamTest(0); } 1127 TEST(MixedParams_0) { MixedParamTest(0); }
1179 TEST(MixedParams_1) { MixedParamTest(1); } 1128 TEST(MixedParams_1) { MixedParamTest(1); }
1180 TEST(MixedParams_2) { MixedParamTest(2); } 1129 TEST(MixedParams_2) { MixedParamTest(2); }
1181 TEST(MixedParams_3) { MixedParamTest(3); } 1130 TEST(MixedParams_3) { MixedParamTest(3); }
1182 1131
1183 template <typename T> 1132 template <typename T>
1184 void TestStackSlot(MachineType slot_type, T expected) { 1133 void TestStackSlot(MachineType slot_type, T expected) {
1185 // Test: Generate with a function f which reserves a stack slot, call an inner 1134 // Test: Generate with a function f which reserves a stack slot, call an inner
1186 // function g from f which writes into the stack slot of f. 1135 // function g from f which writes into the stack slot of f.
1187 1136
1188 if (RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN) 1137 if (GetRegConfig()->num_allocatable_double_registers() < 2) return;
1189 ->num_allocatable_double_registers() < 2)
1190 return;
1191 1138
1192 Isolate* isolate = CcTest::InitIsolateOnce(); 1139 Isolate* isolate = CcTest::InitIsolateOnce();
1193 1140
1194 // Lots of code to generate the build descriptor for the inner function. 1141 // Lots of code to generate the build descriptor for the inner function.
1195 int parray_gp[] = { 1142 int parray_gp[] = {GetRegConfig()->GetAllocatableGeneralCode(0),
1196 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN) 1143 GetRegConfig()->GetAllocatableGeneralCode(1)};
1197 ->GetAllocatableGeneralCode(0), 1144 int rarray_gp[] = {GetRegConfig()->GetAllocatableGeneralCode(0)};
1198 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN) 1145 int parray_fp[] = {GetRegConfig()->GetAllocatableDoubleCode(0),
1199 ->GetAllocatableGeneralCode(1)}; 1146 GetRegConfig()->GetAllocatableDoubleCode(1)};
1200 int rarray_gp[] = { 1147 int rarray_fp[] = {GetRegConfig()->GetAllocatableDoubleCode(0)};
1201 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
1202 ->GetAllocatableGeneralCode(0)};
1203 int parray_fp[] = {
1204 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
1205 ->GetAllocatableDoubleCode(0),
1206 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
1207 ->GetAllocatableDoubleCode(1)};
1208 int rarray_fp[] = {
1209 RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
1210 ->GetAllocatableDoubleCode(0)};
1211 Allocator palloc(parray_gp, 2, parray_fp, 2); 1148 Allocator palloc(parray_gp, 2, parray_fp, 2);
1212 Allocator ralloc(rarray_gp, 1, rarray_fp, 1); 1149 Allocator ralloc(rarray_gp, 1, rarray_fp, 1);
1213 RegisterConfig config(palloc, ralloc); 1150 RegisterConfig config(palloc, ralloc);
1214 1151
1215 Zone zone(isolate->allocator()); 1152 Zone zone(isolate->allocator());
1216 HandleScope scope(isolate); 1153 HandleScope scope(isolate);
1217 MachineSignature::Builder builder(&zone, 1, 12); 1154 MachineSignature::Builder builder(&zone, 1, 12);
1218 builder.AddReturn(MachineType::Int32()); 1155 builder.AddReturn(MachineType::Int32());
1219 for (int i = 0; i < 10; i++) { 1156 for (int i = 0; i < 10; i++) {
1220 builder.AddParam(MachineType::Int32()); 1157 builder.AddParam(MachineType::Int32());
(...skipping 48 matching lines...) Expand 10 before | Expand all | Expand 10 after
1269 TestStackSlot(MachineType::Float32(), magic); 1206 TestStackSlot(MachineType::Float32(), magic);
1270 } 1207 }
1271 1208
1272 TEST(RunStackSlotFloat64) { 1209 TEST(RunStackSlotFloat64) {
1273 double magic = 3456.375; 1210 double magic = 3456.375;
1274 TestStackSlot(MachineType::Float64(), magic); 1211 TestStackSlot(MachineType::Float64(), magic);
1275 } 1212 }
1276 } // namespace compiler 1213 } // namespace compiler
1277 } // namespace internal 1214 } // namespace internal
1278 } // namespace v8 1215 } // namespace v8
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