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Issue 2092413002: [RegisterConfiguration] Streamline access to arch defaults, simplify Registers. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fix compile. Created 4 years, 5 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/register-configuration.h" 5 #include "src/register-configuration.h"
6 #include "src/globals.h" 6 #include "src/globals.h"
7 #include "src/macro-assembler.h" 7 #include "src/macro-assembler.h"
8 8
9 namespace v8 { 9 namespace v8 {
10 namespace internal { 10 namespace internal {
(...skipping 32 matching lines...) Expand 10 before | Expand all | Expand 10 after
43 #define REGISTER_NAME(R) #R, 43 #define REGISTER_NAME(R) #R,
44 DOUBLE_REGISTERS(REGISTER_NAME) 44 DOUBLE_REGISTERS(REGISTER_NAME)
45 #undef REGISTER_NAME 45 #undef REGISTER_NAME
46 }; 46 };
47 47
48 STATIC_ASSERT(RegisterConfiguration::kMaxGeneralRegisters >= 48 STATIC_ASSERT(RegisterConfiguration::kMaxGeneralRegisters >=
49 Register::kNumRegisters); 49 Register::kNumRegisters);
50 STATIC_ASSERT(RegisterConfiguration::kMaxFPRegisters >= 50 STATIC_ASSERT(RegisterConfiguration::kMaxFPRegisters >=
51 DoubleRegister::kMaxNumRegisters); 51 DoubleRegister::kMaxNumRegisters);
52 52
53 enum CompilerSelector { CRANKSHAFT, TURBOFAN };
54
53 class ArchDefaultRegisterConfiguration : public RegisterConfiguration { 55 class ArchDefaultRegisterConfiguration : public RegisterConfiguration {
54 public: 56 public:
55 explicit ArchDefaultRegisterConfiguration(CompilerSelector compiler) 57 explicit ArchDefaultRegisterConfiguration(CompilerSelector compiler)
56 : RegisterConfiguration( 58 : RegisterConfiguration(
57 Register::kNumRegisters, DoubleRegister::kMaxNumRegisters, 59 Register::kNumRegisters, DoubleRegister::kMaxNumRegisters,
58 #if V8_TARGET_ARCH_IA32 60 #if V8_TARGET_ARCH_IA32
59 kMaxAllocatableGeneralRegisterCount, 61 kMaxAllocatableGeneralRegisterCount,
60 kMaxAllocatableDoubleRegisterCount, 62 kMaxAllocatableDoubleRegisterCount,
61 #elif V8_TARGET_ARCH_X87 63 #elif V8_TARGET_ARCH_X87
62 kMaxAllocatableGeneralRegisterCount, 64 kMaxAllocatableGeneralRegisterCount,
(...skipping 25 matching lines...) Expand all
88 kMaxAllocatableDoubleRegisterCount, 90 kMaxAllocatableDoubleRegisterCount,
89 #else 91 #else
90 #error Unsupported target architecture. 92 #error Unsupported target architecture.
91 #endif 93 #endif
92 kAllocatableGeneralCodes, kAllocatableDoubleCodes, 94 kAllocatableGeneralCodes, kAllocatableDoubleCodes,
93 kSimpleFPAliasing ? AliasingKind::OVERLAP : AliasingKind::COMBINE, 95 kSimpleFPAliasing ? AliasingKind::OVERLAP : AliasingKind::COMBINE,
94 kGeneralRegisterNames, kFloatRegisterNames, kDoubleRegisterNames) { 96 kGeneralRegisterNames, kFloatRegisterNames, kDoubleRegisterNames) {
95 } 97 }
96 }; 98 };
97 99
98 100 template <CompilerSelector compiler>
99 template <RegisterConfiguration::CompilerSelector compiler>
100 struct RegisterConfigurationInitializer { 101 struct RegisterConfigurationInitializer {
101 static void Construct(ArchDefaultRegisterConfiguration* config) { 102 static void Construct(ArchDefaultRegisterConfiguration* config) {
102 new (config) ArchDefaultRegisterConfiguration(compiler); 103 new (config) ArchDefaultRegisterConfiguration(compiler);
103 } 104 }
104 }; 105 };
105 106
106 static base::LazyInstance< 107 static base::LazyInstance<ArchDefaultRegisterConfiguration,
107 ArchDefaultRegisterConfiguration, 108 RegisterConfigurationInitializer<CRANKSHAFT>>::type
108 RegisterConfigurationInitializer<RegisterConfiguration::CRANKSHAFT>>::type
109 kDefaultRegisterConfigurationForCrankshaft = LAZY_INSTANCE_INITIALIZER; 109 kDefaultRegisterConfigurationForCrankshaft = LAZY_INSTANCE_INITIALIZER;
110 110
111 111 static base::LazyInstance<ArchDefaultRegisterConfiguration,
112 static base::LazyInstance< 112 RegisterConfigurationInitializer<TURBOFAN>>::type
113 ArchDefaultRegisterConfiguration,
114 RegisterConfigurationInitializer<RegisterConfiguration::TURBOFAN>>::type
115 kDefaultRegisterConfigurationForTurboFan = LAZY_INSTANCE_INITIALIZER; 113 kDefaultRegisterConfigurationForTurboFan = LAZY_INSTANCE_INITIALIZER;
116 114
117 } // namespace 115 } // namespace
118 116
117 const RegisterConfiguration* RegisterConfiguration::Crankshaft() {
118 return &kDefaultRegisterConfigurationForCrankshaft.Get();
119 }
119 120
120 const RegisterConfiguration* RegisterConfiguration::ArchDefault( 121 const RegisterConfiguration* RegisterConfiguration::Turbofan() {
121 CompilerSelector compiler) { 122 return &kDefaultRegisterConfigurationForTurboFan.Get();
122 return compiler == TURBOFAN
123 ? &kDefaultRegisterConfigurationForTurboFan.Get()
124 : &kDefaultRegisterConfigurationForCrankshaft.Get();
125 } 123 }
126 124
127 RegisterConfiguration::RegisterConfiguration( 125 RegisterConfiguration::RegisterConfiguration(
128 int num_general_registers, int num_double_registers, 126 int num_general_registers, int num_double_registers,
129 int num_allocatable_general_registers, int num_allocatable_double_registers, 127 int num_allocatable_general_registers, int num_allocatable_double_registers,
130 const int* allocatable_general_codes, const int* allocatable_double_codes, 128 const int* allocatable_general_codes, const int* allocatable_double_codes,
131 AliasingKind fp_aliasing_kind, const char* const* general_register_names, 129 AliasingKind fp_aliasing_kind, const char* const* general_register_names,
132 const char* const* float_register_names, 130 const char* const* float_register_names,
133 const char* const* double_register_names) 131 const char* const* double_register_names)
134 : num_general_registers_(num_general_registers), 132 : num_general_registers_(num_general_registers),
135 num_float_registers_(0), 133 num_float_registers_(0),
136 num_double_registers_(num_double_registers), 134 num_double_registers_(num_double_registers),
137 num_allocatable_general_registers_(num_allocatable_general_registers), 135 num_allocatable_general_registers_(num_allocatable_general_registers),
138 num_allocatable_double_registers_(num_allocatable_double_registers), 136 num_allocatable_double_registers_(num_allocatable_double_registers),
139 num_allocatable_float_registers_(0), 137 num_allocatable_float_registers_(0),
140 allocatable_general_codes_mask_(0), 138 allocatable_general_codes_mask_(0),
141 allocatable_double_codes_mask_(0), 139 allocatable_double_codes_mask_(0),
140 allocatable_float_codes_mask_(0),
142 allocatable_general_codes_(allocatable_general_codes), 141 allocatable_general_codes_(allocatable_general_codes),
143 allocatable_double_codes_(allocatable_double_codes), 142 allocatable_double_codes_(allocatable_double_codes),
144 fp_aliasing_kind_(fp_aliasing_kind), 143 fp_aliasing_kind_(fp_aliasing_kind),
145 general_register_names_(general_register_names), 144 general_register_names_(general_register_names),
146 float_register_names_(float_register_names), 145 float_register_names_(float_register_names),
147 double_register_names_(double_register_names) { 146 double_register_names_(double_register_names) {
148 DCHECK(num_general_registers_ <= RegisterConfiguration::kMaxGeneralRegisters); 147 DCHECK(num_general_registers_ <= RegisterConfiguration::kMaxGeneralRegisters);
149 DCHECK(num_double_registers_ <= RegisterConfiguration::kMaxFPRegisters); 148 DCHECK(num_double_registers_ <= RegisterConfiguration::kMaxFPRegisters);
150 for (int i = 0; i < num_allocatable_general_registers_; ++i) { 149 for (int i = 0; i < num_allocatable_general_registers_; ++i) {
151 allocatable_general_codes_mask_ |= (1 << allocatable_general_codes_[i]); 150 allocatable_general_codes_mask_ |= (1 << allocatable_general_codes_[i]);
152 } 151 }
153 for (int i = 0; i < num_allocatable_double_registers_; ++i) { 152 for (int i = 0; i < num_allocatable_double_registers_; ++i) {
154 allocatable_double_codes_mask_ |= (1 << allocatable_double_codes_[i]); 153 allocatable_double_codes_mask_ |= (1 << allocatable_double_codes_[i]);
155 } 154 }
156 155
157 if (fp_aliasing_kind_ == COMBINE) { 156 if (fp_aliasing_kind_ == COMBINE) {
158 num_float_registers_ = num_double_registers_ * 2 <= kMaxFPRegisters 157 num_float_registers_ = num_double_registers_ * 2 <= kMaxFPRegisters
159 ? num_double_registers_ * 2 158 ? num_double_registers_ * 2
160 : kMaxFPRegisters; 159 : kMaxFPRegisters;
161 num_allocatable_float_registers_ = 0; 160 num_allocatable_float_registers_ = 0;
162 for (int i = 0; i < num_allocatable_double_registers_; i++) { 161 for (int i = 0; i < num_allocatable_double_registers_; i++) {
163 int base_code = allocatable_double_codes_[i] * 2; 162 int base_code = allocatable_double_codes_[i] * 2;
164 if (base_code >= kMaxFPRegisters) continue; 163 if (base_code >= kMaxFPRegisters) continue;
165 allocatable_float_codes_[num_allocatable_float_registers_++] = base_code; 164 allocatable_float_codes_[num_allocatable_float_registers_++] = base_code;
166 allocatable_float_codes_[num_allocatable_float_registers_++] = 165 allocatable_float_codes_[num_allocatable_float_registers_++] =
167 base_code + 1; 166 base_code + 1;
167 allocatable_float_codes_mask_ |= (0x3 << base_code);
168 } 168 }
169 } else { 169 } else {
170 DCHECK(fp_aliasing_kind_ == OVERLAP); 170 DCHECK(fp_aliasing_kind_ == OVERLAP);
171 num_float_registers_ = num_double_registers_; 171 num_float_registers_ = num_double_registers_;
172 num_allocatable_float_registers_ = num_allocatable_double_registers_; 172 num_allocatable_float_registers_ = num_allocatable_double_registers_;
173 for (int i = 0; i < num_allocatable_float_registers_; ++i) { 173 for (int i = 0; i < num_allocatable_float_registers_; ++i) {
174 allocatable_float_codes_[i] = allocatable_double_codes_[i]; 174 allocatable_float_codes_[i] = allocatable_double_codes_[i];
175 } 175 }
176 allocatable_float_codes_mask_ = allocatable_double_codes_mask_;
176 } 177 }
177 } 178 }
178 179
179 int RegisterConfiguration::GetAliases(MachineRepresentation rep, int index, 180 int RegisterConfiguration::GetAliases(MachineRepresentation rep, int index,
180 MachineRepresentation other_rep, 181 MachineRepresentation other_rep,
181 int* alias_base_index) const { 182 int* alias_base_index) const {
182 DCHECK(fp_aliasing_kind_ == COMBINE); 183 DCHECK(fp_aliasing_kind_ == COMBINE);
183 DCHECK(rep == MachineRepresentation::kFloat32 || 184 DCHECK(rep == MachineRepresentation::kFloat32 ||
184 rep == MachineRepresentation::kFloat64); 185 rep == MachineRepresentation::kFloat64);
185 DCHECK(other_rep == MachineRepresentation::kFloat32 || 186 DCHECK(other_rep == MachineRepresentation::kFloat32 ||
(...skipping 39 matching lines...) Expand 10 before | Expand all | Expand 10 after
225 // Alias indices are out of float register range. 226 // Alias indices are out of float register range.
226 return false; 227 return false;
227 } 228 }
228 return index == other_index / 2; 229 return index == other_index / 2;
229 } 230 }
230 231
231 #undef REGISTER_COUNT 232 #undef REGISTER_COUNT
232 233
233 } // namespace internal 234 } // namespace internal
234 } // namespace v8 235 } // namespace v8
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