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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include <limits.h> // For LONG_MIN, LONG_MAX. | 5 #include <limits.h> // For LONG_MIN, LONG_MAX. |
6 | 6 |
7 #if V8_TARGET_ARCH_MIPS | 7 #if V8_TARGET_ARCH_MIPS |
8 | 8 |
9 #include "src/base/bits.h" | 9 #include "src/base/bits.h" |
10 #include "src/base/division-by-constant.h" | 10 #include "src/base/division-by-constant.h" |
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6712 Register reg5, | 6712 Register reg5, |
6713 Register reg6) { | 6713 Register reg6) { |
6714 RegList regs = 0; | 6714 RegList regs = 0; |
6715 if (reg1.is_valid()) regs |= reg1.bit(); | 6715 if (reg1.is_valid()) regs |= reg1.bit(); |
6716 if (reg2.is_valid()) regs |= reg2.bit(); | 6716 if (reg2.is_valid()) regs |= reg2.bit(); |
6717 if (reg3.is_valid()) regs |= reg3.bit(); | 6717 if (reg3.is_valid()) regs |= reg3.bit(); |
6718 if (reg4.is_valid()) regs |= reg4.bit(); | 6718 if (reg4.is_valid()) regs |= reg4.bit(); |
6719 if (reg5.is_valid()) regs |= reg5.bit(); | 6719 if (reg5.is_valid()) regs |= reg5.bit(); |
6720 if (reg6.is_valid()) regs |= reg6.bit(); | 6720 if (reg6.is_valid()) regs |= reg6.bit(); |
6721 | 6721 |
6722 const RegisterConfiguration* config = | 6722 const RegisterConfiguration* config = RegisterConfiguration::Crankshaft(); |
6723 RegisterConfiguration::ArchDefault(RegisterConfiguration::CRANKSHAFT); | |
6724 for (int i = 0; i < config->num_allocatable_general_registers(); ++i) { | 6723 for (int i = 0; i < config->num_allocatable_general_registers(); ++i) { |
6725 int code = config->GetAllocatableGeneralCode(i); | 6724 int code = config->GetAllocatableGeneralCode(i); |
6726 Register candidate = Register::from_code(code); | 6725 Register candidate = Register::from_code(code); |
6727 if (regs & candidate.bit()) continue; | 6726 if (regs & candidate.bit()) continue; |
6728 return candidate; | 6727 return candidate; |
6729 } | 6728 } |
6730 UNREACHABLE(); | 6729 UNREACHABLE(); |
6731 return no_reg; | 6730 return no_reg; |
6732 } | 6731 } |
6733 | 6732 |
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6852 if (mag.shift > 0) sra(result, result, mag.shift); | 6851 if (mag.shift > 0) sra(result, result, mag.shift); |
6853 srl(at, dividend, 31); | 6852 srl(at, dividend, 31); |
6854 Addu(result, result, Operand(at)); | 6853 Addu(result, result, Operand(at)); |
6855 } | 6854 } |
6856 | 6855 |
6857 | 6856 |
6858 } // namespace internal | 6857 } // namespace internal |
6859 } // namespace v8 | 6858 } // namespace v8 |
6860 | 6859 |
6861 #endif // V8_TARGET_ARCH_MIPS | 6860 #endif // V8_TARGET_ARCH_MIPS |
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