Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(108)

Side by Side Diff: src/mips/assembler-mips.h

Issue 2092413002: [RegisterConfiguration] Streamline access to arch defaults, simplify Registers. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fix compile. Created 4 years, 5 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « src/ia32/deoptimizer-ia32.cc ('k') | src/mips/deoptimizer-mips.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright (c) 1994-2006 Sun Microsystems Inc. 1 // Copyright (c) 1994-2006 Sun Microsystems Inc.
2 // All Rights Reserved. 2 // All Rights Reserved.
3 // 3 //
4 // Redistribution and use in source and binary forms, with or without 4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are 5 // modification, are permitted provided that the following conditions are
6 // met: 6 // met:
7 // 7 //
8 // - Redistributions of source code must retain the above copyright notice, 8 // - Redistributions of source code must retain the above copyright notice,
9 // this list of conditions and the following disclaimer. 9 // this list of conditions and the following disclaimer.
10 // 10 //
(...skipping 107 matching lines...) Expand 10 before | Expand all | Expand 10 after
118 #error Unknown endianness 118 #error Unknown endianness
119 #endif 119 #endif
120 120
121 121
122 static Register from_code(int code) { 122 static Register from_code(int code) {
123 DCHECK(code >= 0); 123 DCHECK(code >= 0);
124 DCHECK(code < kNumRegisters); 124 DCHECK(code < kNumRegisters);
125 Register r = {code}; 125 Register r = {code};
126 return r; 126 return r;
127 } 127 }
128 const char* ToString();
129 bool IsAllocatable(RegisterConfiguration::CompilerSelector compiler =
130 RegisterConfiguration::CRANKSHAFT) const;
131 bool is_valid() const { return 0 <= reg_code && reg_code < kNumRegisters; } 128 bool is_valid() const { return 0 <= reg_code && reg_code < kNumRegisters; }
132 bool is(Register reg) const { return reg_code == reg.reg_code; } 129 bool is(Register reg) const { return reg_code == reg.reg_code; }
133 int code() const { 130 int code() const {
134 DCHECK(is_valid()); 131 DCHECK(is_valid());
135 return reg_code; 132 return reg_code;
136 } 133 }
137 int bit() const { 134 int bit() const {
138 DCHECK(is_valid()); 135 DCHECK(is_valid());
139 return 1 << reg_code; 136 return 1 << reg_code;
140 } 137 }
(...skipping 28 matching lines...) Expand all
169 }; 166 };
170 167
171 static const int kMaxNumRegisters = Code::kAfterLast; 168 static const int kMaxNumRegisters = Code::kAfterLast;
172 169
173 inline static int NumRegisters(); 170 inline static int NumRegisters();
174 171
175 // TODO(plind): Warning, inconsistent numbering here. kNumFPURegisters refers 172 // TODO(plind): Warning, inconsistent numbering here. kNumFPURegisters refers
176 // to number of 32-bit FPU regs, but kNumAllocatableRegisters refers to 173 // to number of 32-bit FPU regs, but kNumAllocatableRegisters refers to
177 // number of Double regs (64-bit regs, or FPU-reg-pairs). 174 // number of Double regs (64-bit regs, or FPU-reg-pairs).
178 175
179 const char* ToString();
180 bool IsAllocatable(RegisterConfiguration::CompilerSelector compiler =
181 RegisterConfiguration::CRANKSHAFT) const;
182 bool is_valid() const { return 0 <= reg_code && reg_code < kMaxNumRegisters; } 176 bool is_valid() const { return 0 <= reg_code && reg_code < kMaxNumRegisters; }
183 bool is(FPURegister reg) const { return reg_code == reg.reg_code; } 177 bool is(FPURegister reg) const { return reg_code == reg.reg_code; }
184 FPURegister low() const { 178 FPURegister low() const {
185 // Find low reg of a Double-reg pair, which is the reg itself. 179 // Find low reg of a Double-reg pair, which is the reg itself.
186 DCHECK(reg_code % 2 == 0); // Specified Double reg must be even. 180 DCHECK(reg_code % 2 == 0); // Specified Double reg must be even.
187 FPURegister reg; 181 FPURegister reg;
188 reg.reg_code = reg_code; 182 reg.reg_code = reg_code;
189 DCHECK(reg.is_valid()); 183 DCHECK(reg.is_valid());
190 return reg; 184 return reg;
191 } 185 }
(...skipping 1281 matching lines...) Expand 10 before | Expand all | Expand 10 after
1473 public: 1467 public:
1474 explicit EnsureSpace(Assembler* assembler) { 1468 explicit EnsureSpace(Assembler* assembler) {
1475 assembler->CheckBuffer(); 1469 assembler->CheckBuffer();
1476 } 1470 }
1477 }; 1471 };
1478 1472
1479 } // namespace internal 1473 } // namespace internal
1480 } // namespace v8 1474 } // namespace v8
1481 1475
1482 #endif // V8_ARM_ASSEMBLER_MIPS_H_ 1476 #endif // V8_ARM_ASSEMBLER_MIPS_H_
OLDNEW
« no previous file with comments | « src/ia32/deoptimizer-ia32.cc ('k') | src/mips/deoptimizer-mips.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698