[RegisterConfiguration] Streamline access to arch defaults, simplify Registers.

src/compiler/instruction.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/common-operator.h"
 #include "src/compiler/graph.h"
 #include "src/compiler/instruction.h"
 #include "src/compiler/schedule.h"
 #include "src/compiler/state-values-utils.h"
 
 namespace v8 {
 namespace internal {
 namespace compiler {
 
+const auto GetRegConfig = RegisterConfiguration::Turbofan;
 
 FlagsCondition CommuteFlagsCondition(FlagsCondition condition) {
   switch (condition) {
     case kSignedLessThan:
       return kSignedGreaterThan;
     case kSignedGreaterThanOrEqual:
       return kSignedLessThanOrEqual;
     case kSignedLessThanOrEqual:
       return kSignedGreaterThanOrEqual;
     case kSignedGreaterThan:
@@ skipping 32 matching lines @@
   }
   UNREACHABLE();
   return condition;
 }
 
 bool InstructionOperand::InterferesWith(const InstructionOperand& that) const {
   if (!IsFPRegister() || !that.IsFPRegister()) return EqualsCanonicalized(that);
 
   const LocationOperand& loc1 = *LocationOperand::cast(this);
   const LocationOperand& loc2 = LocationOperand::cast(that);
-  const RegisterConfiguration* config =
-      RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN);
+  const RegisterConfiguration* config = GetRegConfig();
   if (config->fp_aliasing_kind() != RegisterConfiguration::COMBINE)
     return loc1.register_code() == loc2.register_code();
 
   return config->AreAliases(loc1.representation(), loc1.register_code(),
                             loc2.representation(), loc2.register_code());
 }
 
 void InstructionOperand::Print(const RegisterConfiguration* config) const {
   OFStream os(stdout);
   PrintableInstructionOperand wrapper;
   wrapper.register_configuration_ = config;
   wrapper.op_ = *this;
   os << wrapper << std::endl;
 }
 
-
-void InstructionOperand::Print() const {
-  const RegisterConfiguration* config =
-      RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN);
-  Print(config);
-}
+void InstructionOperand::Print() const { Print(GetRegConfig()); }
 
 std::ostream& operator<<(std::ostream& os,
                          const PrintableInstructionOperand& printable) {
   const InstructionOperand& op = printable.op_;
   const RegisterConfiguration* conf = printable.register_configuration_;
   switch (op.kind()) {
     case InstructionOperand::UNALLOCATED: {
       const UnallocatedOperand* unalloc = UnallocatedOperand::cast(&op);
       os << "v" << unalloc->virtual_register();
       if (unalloc->basic_policy() == UnallocatedOperand::FIXED_SLOT) {
@@ skipping 35 matching lines @@
       }
     }
     case InstructionOperand::EXPLICIT:
     case InstructionOperand::ALLOCATED: {
       LocationOperand allocated = LocationOperand::cast(op);
       if (op.IsStackSlot()) {
         os << "[stack:" << allocated.index();
       } else if (op.IsFPStackSlot()) {
         os << "[fp_stack:" << allocated.index();
       } else if (op.IsRegister()) {
-        os << "[" << allocated.GetRegister().ToString() << "|R";
+        os << "["
+           << GetRegConfig()->GetGeneralRegisterName(allocated.register_code())
+           << "|R";
       } else if (op.IsDoubleRegister()) {
-        os << "[" << allocated.GetDoubleRegister().ToString() << "|R";
+        os << "["
+           << GetRegConfig()->GetDoubleRegisterName(allocated.register_code())
+           << "|R";
       } else {
         DCHECK(op.IsFloatRegister());
-        os << "[" << allocated.GetFloatRegister().ToString() << "|R";
+        os << "["
+           << GetRegConfig()->GetFloatRegisterName(allocated.register_code())
+           << "|R";
       }
       if (allocated.IsExplicit()) {
         os << "|E";
       }
       switch (allocated.representation()) {
         case MachineRepresentation::kNone:
           os << "|-";
           break;
         case MachineRepresentation::kBit:
           os << "|b";
@@ skipping 35 matching lines @@
 void MoveOperands::Print(const RegisterConfiguration* config) const {
   OFStream os(stdout);
   PrintableInstructionOperand wrapper;
   wrapper.register_configuration_ = config;
   wrapper.op_ = destination();
   os << wrapper << " = ";
   wrapper.op_ = source();
   os << wrapper << std::endl;
 }
 
-
-void MoveOperands::Print() const {
-  const RegisterConfiguration* config =
-      RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN);
-  Print(config);
-}
-
+void MoveOperands::Print() const { Print(GetRegConfig()); }
 
 std::ostream& operator<<(std::ostream& os,
                          const PrintableMoveOperands& printable) {
   const MoveOperands& mo = *printable.move_operands_;
   PrintableInstructionOperand printable_op = {printable.register_configuration_,
                                               mo.destination()};
   os << printable_op;
   if (!mo.source().Equals(mo.destination())) {
     printable_op.op_ = mo.source();
     os << " = " << printable_op;
@@ skipping 28 matching lines @@
   DCHECK_IMPLIES(replacement == to_eliminate, replacement == nullptr);
   if (replacement != nullptr) move->set_source(replacement->source());
   return to_eliminate;
 }
 
 
 ExplicitOperand::ExplicitOperand(LocationKind kind, MachineRepresentation rep,
                                  int index)
     : LocationOperand(EXPLICIT, kind, rep, index) {
   DCHECK_IMPLIES(kind == REGISTER && !IsFloatingPoint(rep),
-                 Register::from_code(index).IsAllocatable(
-                     RegisterConfiguration::TURBOFAN));
+                 GetRegConfig()->IsAllocatableGeneralCode(index));
   DCHECK_IMPLIES(kind == REGISTER && rep == MachineRepresentation::kFloat32,
-                 FloatRegister::from_code(index).IsAllocatable(
-                     RegisterConfiguration::TURBOFAN));
+                 GetRegConfig()->IsAllocatableFloatCode(index));
   DCHECK_IMPLIES(kind == REGISTER && (rep == MachineRepresentation::kFloat64),
-                 DoubleRegister::from_code(index).IsAllocatable(
-                     RegisterConfiguration::TURBOFAN));
+                 GetRegConfig()->IsAllocatableDoubleCode(index));
 }
 
 Instruction::Instruction(InstructionCode opcode)
     : opcode_(opcode),
       bit_field_(OutputCountField::encode(0) | InputCountField::encode(0) |
                  TempCountField::encode(0) | IsCallField::encode(false)),
       reference_map_(nullptr),
       block_(nullptr) {
   parallel_moves_[0] = nullptr;
   parallel_moves_[1] = nullptr;
@@ skipping 40 matching lines @@
 
 
 void Instruction::Print(const RegisterConfiguration* config) const {
   OFStream os(stdout);
   PrintableInstruction wrapper;
   wrapper.instr_ = this;
   wrapper.register_configuration_ = config;
   os << wrapper << std::endl;
 }
 
-
-void Instruction::Print() const {
-  const RegisterConfiguration* config =
-      RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN);
-  Print(config);
-}
-
+void Instruction::Print() const { Print(GetRegConfig()); }
 
 std::ostream& operator<<(std::ostream& os,
                          const PrintableParallelMove& printable) {
   const ParallelMove& pm = *printable.parallel_move_;
   bool first = true;
   for (MoveOperands* move : pm) {
     if (move->IsEliminated()) continue;
     if (!first) os << " ";
     first = false;
     PrintableMoveOperands pmo = {printable.register_configuration_, move};
     os << pmo;
   }
   return os;
 }
 
 
 void ReferenceMap::RecordReference(const AllocatedOperand& op) {
   // Do not record arguments as pointers.
   if (op.IsStackSlot() && LocationOperand::cast(op).index() < 0) return;
   DCHECK(!op.IsFPRegister() && !op.IsFPStackSlot());
   reference_operands_.push_back(op);
 }
 
 
 std::ostream& operator<<(std::ostream& os, const ReferenceMap& pm) {
   os << "{";
   bool first = true;
-  PrintableInstructionOperand poi = {
-      RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN),
-      InstructionOperand()};
+  PrintableInstructionOperand poi = {GetRegConfig(), InstructionOperand()};
   for (const InstructionOperand& op : pm.reference_operands_) {
     if (!first) {
       os << ";";
     } else {
       first = false;
     }
     poi.op_ = op;
     os << poi;
   }
   return os << "}";
@@ skipping 514 matching lines @@
 
 
 void InstructionSequence::Print(const RegisterConfiguration* config) const {
   OFStream os(stdout);
   PrintableInstructionSequence wrapper;
   wrapper.register_configuration_ = config;
   wrapper.sequence_ = this;
   os << wrapper << std::endl;
 }
 
-
-void InstructionSequence::Print() const {
-  const RegisterConfiguration* config =
-      RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN);
-  Print(config);
-}
+void InstructionSequence::Print() const { Print(GetRegConfig()); }
 
 void InstructionSequence::PrintBlock(const RegisterConfiguration* config,
                                      int block_id) const {
   OFStream os(stdout);
   RpoNumber rpo = RpoNumber::FromInt(block_id);
   const InstructionBlock* block = InstructionBlockAt(rpo);
   CHECK(block->rpo_number() == rpo);
 
   os << "B" << block->rpo_number();
   os << ": AO#" << block->ao_number();
@@ skipping 33 matching lines @@
     os << "   " << buf.start() << ": " << printable_instr << "\n";
   }
 
   for (RpoNumber succ : block->successors()) {
     os << " B" << succ.ToInt();
   }
   os << "\n";
 }
 
 void InstructionSequence::PrintBlock(int block_id) const {
-  const RegisterConfiguration* config =
-      RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN);
-  PrintBlock(config, block_id);
+  PrintBlock(GetRegConfig(), block_id);
 }
 
 FrameStateDescriptor::FrameStateDescriptor(
     Zone* zone, FrameStateType type, BailoutId bailout_id,
     OutputFrameStateCombine state_combine, size_t parameters_count,
     size_t locals_count, size_t stack_count,
     MaybeHandle<SharedFunctionInfo> shared_info,
     FrameStateDescriptor* outer_state)
     : type_(type),
       bailout_id_(bailout_id),
@@ skipping 71 matching lines @@
   }
   for (int i = 0; i < code.InstructionBlockCount(); i++) {
     printable.sequence_->PrintBlock(printable.register_configuration_, i);
   }
   return os;
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8