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1 // Copyright 2013 the V8 project authors. All rights reserved. | 1 // Copyright 2013 the V8 project authors. All rights reserved. |
2 // | 2 // |
3 // Redistribution and use in source and binary forms, with or without | 3 // Redistribution and use in source and binary forms, with or without |
4 // modification, are permitted provided that the following conditions are | 4 // modification, are permitted provided that the following conditions are |
5 // met: | 5 // met: |
6 // | 6 // |
7 // * Redistributions of source code must retain the above copyright | 7 // * Redistributions of source code must retain the above copyright |
8 // notice, this list of conditions and the following disclaimer. | 8 // notice, this list of conditions and the following disclaimer. |
9 // * Redistributions in binary form must reproduce the above | 9 // * Redistributions in binary form must reproduce the above |
10 // copyright notice, this list of conditions and the following | 10 // copyright notice, this list of conditions and the following |
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200 } | 200 } |
201 | 201 |
202 void RelocInfo::unchecked_update_wasm_memory_size(uint32_t size, | 202 void RelocInfo::unchecked_update_wasm_memory_size(uint32_t size, |
203 ICacheFlushMode flush_mode) { | 203 ICacheFlushMode flush_mode) { |
204 Memory::uint32_at(Assembler::target_pointer_address_at(pc_)) = size; | 204 Memory::uint32_at(Assembler::target_pointer_address_at(pc_)) = size; |
205 } | 205 } |
206 | 206 |
207 Register GetAllocatableRegisterThatIsNotOneOf(Register reg1, Register reg2, | 207 Register GetAllocatableRegisterThatIsNotOneOf(Register reg1, Register reg2, |
208 Register reg3, Register reg4) { | 208 Register reg3, Register reg4) { |
209 CPURegList regs(reg1, reg2, reg3, reg4); | 209 CPURegList regs(reg1, reg2, reg3, reg4); |
210 const RegisterConfiguration* config = | 210 const RegisterConfiguration* config = RegisterConfiguration::Crankshaft(); |
211 RegisterConfiguration::ArchDefault(RegisterConfiguration::CRANKSHAFT); | |
212 for (int i = 0; i < config->num_allocatable_double_registers(); ++i) { | 211 for (int i = 0; i < config->num_allocatable_double_registers(); ++i) { |
213 int code = config->GetAllocatableDoubleCode(i); | 212 int code = config->GetAllocatableDoubleCode(i); |
214 Register candidate = Register::from_code(code); | 213 Register candidate = Register::from_code(code); |
215 if (regs.IncludesAliasOf(candidate)) continue; | 214 if (regs.IncludesAliasOf(candidate)) continue; |
216 return candidate; | 215 return candidate; |
217 } | 216 } |
218 UNREACHABLE(); | 217 UNREACHABLE(); |
219 return NoReg; | 218 return NoReg; |
220 } | 219 } |
221 | 220 |
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3213 movk(scratch, (target_offset >> 32) & 0xFFFF, 32); | 3212 movk(scratch, (target_offset >> 32) & 0xFFFF, 32); |
3214 DCHECK((target_offset >> 48) == 0); | 3213 DCHECK((target_offset >> 48) == 0); |
3215 add(rd, rd, scratch); | 3214 add(rd, rd, scratch); |
3216 } | 3215 } |
3217 | 3216 |
3218 | 3217 |
3219 } // namespace internal | 3218 } // namespace internal |
3220 } // namespace v8 | 3219 } // namespace v8 |
3221 | 3220 |
3222 #endif // V8_TARGET_ARCH_ARM64 | 3221 #endif // V8_TARGET_ARCH_ARM64 |
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