[Turbofan] Add Simd128 registers to RegisterConfiguration.

src/register-configuration.h

Index: src/register-configuration.h
diff --git a/src/register-configuration.h b/src/register-configuration.h
index 25f3ef5f20b033a47b1df36c5d7e981cd88986d9..db57026b52054d1d27d5ebb001bf600c5f750f5e 100644
--- a/src/register-configuration.h
+++ b/src/register-configuration.h
@@ -40,19 +40,24 @@ class RegisterConfiguration {
                         AliasingKind fp_aliasing_kind,
                         char const* const* general_names,
                         char const* const* float_names,
-                        char const* const* double_names);
+                        char const* const* double_names,
+                        char const* const* simd128_names);
 
   int num_general_registers() const { return num_general_registers_; }
   int num_float_registers() const { return num_float_registers_; }
   int num_double_registers() const { return num_double_registers_; }
+  int num_simd128_registers() const { return num_simd128_registers_; }
   int num_allocatable_general_registers() const {
     return num_allocatable_general_registers_;
   }
+  int num_allocatable_float_registers() const {
+    return num_allocatable_float_registers_;
+  }
   int num_allocatable_double_registers() const {
     return num_allocatable_double_registers_;
   }
-  int num_allocatable_float_registers() const {
-    return num_allocatable_float_registers_;
+  int num_allocatable_simd128_registers() const {
+    return num_allocatable_simd128_registers_;
   }
   AliasingKind fp_aliasing_kind() const { return fp_aliasing_kind_; }
   int32_t allocatable_general_codes_mask() const {
@@ -67,17 +72,23 @@ class RegisterConfiguration {
   bool IsAllocatableGeneralCode(int index) const {
     return ((1 << index) & allocatable_general_codes_mask_) != 0;
   }
+  int GetAllocatableFloatCode(int index) const {
+    return allocatable_float_codes_[index];
+  }
+  bool IsAllocatableFloatCode(int index) const {
+    return ((1 << index) & allocatable_float_codes_mask_) != 0;
+  }
   int GetAllocatableDoubleCode(int index) const {
     return allocatable_double_codes_[index];
   }
   bool IsAllocatableDoubleCode(int index) const {
     return ((1 << index) & allocatable_double_codes_mask_) != 0;
   }
-  int GetAllocatableFloatCode(int index) const {
-    return allocatable_float_codes_[index];
+  int GetAllocatableSimd128Code(int index) const {
+    return allocatable_simd128_codes_[index];
   }
-  bool IsAllocatableFloatCode(int index) const {
-    return ((1 << index) & allocatable_float_codes_mask_) != 0;
+  bool IsAllocatableSimd128Code(int index) const {
+    return ((1 << index) & allocatable_simd128_codes_mask_) != 0;
   }
   const char* GetGeneralRegisterName(int code) const {
     return general_register_names_[code];
@@ -88,25 +99,31 @@ class RegisterConfiguration {
   const char* GetDoubleRegisterName(int code) const {
     return double_register_names_[code];
   }
+  const char* GetSimd128RegisterName(int code) const {
+    return simd128_register_names_[code];
+  }
   const int* allocatable_general_codes() const {
     return allocatable_general_codes_;
   }
+  const int* allocatable_float_codes() const {
+    return allocatable_float_codes_;
+  }
   const int* allocatable_double_codes() const {
     return allocatable_double_codes_;
   }
-  const int* allocatable_float_codes() const {
-    return allocatable_float_codes_;
+  const int* allocatable_simd128_codes() const {
+    return allocatable_simd128_codes_;
   }
 
   // Aliasing calculations for floating point registers, when fp_aliasing_kind()
-  // is COMBINE. Currently only implemented for kFloat32, or kFloat64 reps.
-  // Returns the number of aliases, and if > 0, alias_base_index is set to the
-  // index of the first alias.
+  // is COMBINE. Currently only implemented for kFloat32, kFloat64, or kSimd128
+  // reps. Returns the number of aliases, and if > 0, alias_base_index is set to
+  // the index of the first alias.
   int GetAliases(MachineRepresentation rep, int index,
                  MachineRepresentation other_rep, int* alias_base_index) const;
   // Returns a value indicating whether two registers alias each other, when
-  // fp_aliasing_kind() is COMBINE. Currently only implemented for kFloat32, or
-  // kFloat64 reps.
+  // fp_aliasing_kind() is COMBINE. Currently implemented for kFloat32,
+  // kFloat64, or kSimd128 reps.
   bool AreAliases(MachineRepresentation rep, int index,
                   MachineRepresentation other_rep, int other_index) const;
 
@@ -114,19 +131,24 @@ class RegisterConfiguration {
   const int num_general_registers_;
   int num_float_registers_;
   const int num_double_registers_;
+  int num_simd128_registers_;
   int num_allocatable_general_registers_;
-  int num_allocatable_double_registers_;
   int num_allocatable_float_registers_;
+  int num_allocatable_double_registers_;
+  int num_allocatable_simd128_registers_;
   int32_t allocatable_general_codes_mask_;
-  int32_t allocatable_double_codes_mask_;
   int32_t allocatable_float_codes_mask_;
+  int32_t allocatable_double_codes_mask_;
+  int32_t allocatable_simd128_codes_mask_;
   const int* allocatable_general_codes_;
-  const int* allocatable_double_codes_;
   int allocatable_float_codes_[kMaxFPRegisters];
+  const int* allocatable_double_codes_;
+  int allocatable_simd128_codes_[kMaxFPRegisters];
   AliasingKind fp_aliasing_kind_;
   char const* const* general_register_names_;
   char const* const* float_register_names_;
   char const* const* double_register_names_;
+  char const* const* simd128_register_names_;
 };
 
 }  // namespace internal