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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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68 V(stX_0) \ | 68 V(stX_0) \ |
69 V(stX_1) \ | 69 V(stX_1) \ |
70 V(stX_2) \ | 70 V(stX_2) \ |
71 V(stX_3) \ | 71 V(stX_3) \ |
72 V(stX_4) \ | 72 V(stX_4) \ |
73 V(stX_5) \ | 73 V(stX_5) \ |
74 V(stX_6) \ | 74 V(stX_6) \ |
75 V(stX_7) | 75 V(stX_7) |
76 | 76 |
77 #define FLOAT_REGISTERS DOUBLE_REGISTERS | 77 #define FLOAT_REGISTERS DOUBLE_REGISTERS |
| 78 #define SIMD128_REGISTERS DOUBLE_REGISTERS |
78 | 79 |
79 #define ALLOCATABLE_DOUBLE_REGISTERS(V) \ | 80 #define ALLOCATABLE_DOUBLE_REGISTERS(V) \ |
80 V(stX_0) \ | 81 V(stX_0) \ |
81 V(stX_1) \ | 82 V(stX_1) \ |
82 V(stX_2) \ | 83 V(stX_2) \ |
83 V(stX_3) \ | 84 V(stX_3) \ |
84 V(stX_4) \ | 85 V(stX_4) \ |
85 V(stX_5) | 86 V(stX_5) |
86 | 87 |
87 // CPU Registers. | 88 // CPU Registers. |
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1102 Assembler* assembler_; | 1103 Assembler* assembler_; |
1103 #ifdef DEBUG | 1104 #ifdef DEBUG |
1104 int space_before_; | 1105 int space_before_; |
1105 #endif | 1106 #endif |
1106 }; | 1107 }; |
1107 | 1108 |
1108 } // namespace internal | 1109 } // namespace internal |
1109 } // namespace v8 | 1110 } // namespace v8 |
1110 | 1111 |
1111 #endif // V8_X87_ASSEMBLER_X87_H_ | 1112 #endif // V8_X87_ASSEMBLER_X87_H_ |
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