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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
6 // met: | 6 // met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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68 V(xmm0) \ | 68 V(xmm0) \ |
69 V(xmm1) \ | 69 V(xmm1) \ |
70 V(xmm2) \ | 70 V(xmm2) \ |
71 V(xmm3) \ | 71 V(xmm3) \ |
72 V(xmm4) \ | 72 V(xmm4) \ |
73 V(xmm5) \ | 73 V(xmm5) \ |
74 V(xmm6) \ | 74 V(xmm6) \ |
75 V(xmm7) | 75 V(xmm7) |
76 | 76 |
77 #define FLOAT_REGISTERS DOUBLE_REGISTERS | 77 #define FLOAT_REGISTERS DOUBLE_REGISTERS |
78 #define SIMD_REGISTERS DOUBLE_REGISTERS | 78 #define SIMD128_REGISTERS DOUBLE_REGISTERS |
79 | 79 |
80 #define ALLOCATABLE_DOUBLE_REGISTERS(V) \ | 80 #define ALLOCATABLE_DOUBLE_REGISTERS(V) \ |
81 V(xmm1) \ | 81 V(xmm1) \ |
82 V(xmm2) \ | 82 V(xmm2) \ |
83 V(xmm3) \ | 83 V(xmm3) \ |
84 V(xmm4) \ | 84 V(xmm4) \ |
85 V(xmm5) \ | 85 V(xmm5) \ |
86 V(xmm6) \ | 86 V(xmm6) \ |
87 V(xmm7) | 87 V(xmm7) |
88 | 88 |
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1597 Assembler* assembler_; | 1597 Assembler* assembler_; |
1598 #ifdef DEBUG | 1598 #ifdef DEBUG |
1599 int space_before_; | 1599 int space_before_; |
1600 #endif | 1600 #endif |
1601 }; | 1601 }; |
1602 | 1602 |
1603 } // namespace internal | 1603 } // namespace internal |
1604 } // namespace v8 | 1604 } // namespace v8 |
1605 | 1605 |
1606 #endif // V8_IA32_ASSEMBLER_IA32_H_ | 1606 #endif // V8_IA32_ASSEMBLER_IA32_H_ |
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