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Side by Side Diff: src/compiler/register-allocator.h

Issue 2092103004: [Turbofan] Add Simd128 registers to RegisterConfiguration. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Eliminate some dead code, simplify. Created 4 years, 5 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_REGISTER_ALLOCATOR_H_ 5 #ifndef V8_REGISTER_ALLOCATOR_H_
6 #define V8_REGISTER_ALLOCATOR_H_ 6 #define V8_REGISTER_ALLOCATOR_H_
7 7
8 #include "src/compiler/instruction.h" 8 #include "src/compiler/instruction.h"
9 #include "src/ostreams.h" 9 #include "src/ostreams.h"
10 #include "src/register-configuration.h" 10 #include "src/register-configuration.h"
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772 } 772 }
773 const ZoneVector<TopLevelLiveRange*>& fixed_float_live_ranges() const { 773 const ZoneVector<TopLevelLiveRange*>& fixed_float_live_ranges() const {
774 return fixed_float_live_ranges_; 774 return fixed_float_live_ranges_;
775 } 775 }
776 ZoneVector<TopLevelLiveRange*>& fixed_double_live_ranges() { 776 ZoneVector<TopLevelLiveRange*>& fixed_double_live_ranges() {
777 return fixed_double_live_ranges_; 777 return fixed_double_live_ranges_;
778 } 778 }
779 const ZoneVector<TopLevelLiveRange*>& fixed_double_live_ranges() const { 779 const ZoneVector<TopLevelLiveRange*>& fixed_double_live_ranges() const {
780 return fixed_double_live_ranges_; 780 return fixed_double_live_ranges_;
781 } 781 }
782 ZoneVector<TopLevelLiveRange*>& fixed_simd128_live_ranges() {
783 return fixed_simd128_live_ranges_;
784 }
785 const ZoneVector<TopLevelLiveRange*>& fixed_simd128_live_ranges() const {
786 return fixed_simd128_live_ranges_;
787 }
782 ZoneVector<BitVector*>& live_in_sets() { return live_in_sets_; } 788 ZoneVector<BitVector*>& live_in_sets() { return live_in_sets_; }
783 ZoneVector<BitVector*>& live_out_sets() { return live_out_sets_; } 789 ZoneVector<BitVector*>& live_out_sets() { return live_out_sets_; }
784 ZoneVector<SpillRange*>& spill_ranges() { return spill_ranges_; } 790 ZoneVector<SpillRange*>& spill_ranges() { return spill_ranges_; }
785 DelayedReferences& delayed_references() { return delayed_references_; } 791 DelayedReferences& delayed_references() { return delayed_references_; }
786 InstructionSequence* code() const { return code_; } 792 InstructionSequence* code() const { return code_; }
787 // This zone is for data structures only needed during register allocation 793 // This zone is for data structures only needed during register allocation
788 // phases. 794 // phases.
789 Zone* allocation_zone() const { return allocation_zone_; } 795 Zone* allocation_zone() const { return allocation_zone_; }
790 // This zone is for InstructionOperands and moves that live beyond register 796 // This zone is for InstructionOperands and moves that live beyond register
791 // allocation. 797 // allocation.
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835 InstructionSequence* const code_; 841 InstructionSequence* const code_;
836 const char* const debug_name_; 842 const char* const debug_name_;
837 const RegisterConfiguration* const config_; 843 const RegisterConfiguration* const config_;
838 PhiMap phi_map_; 844 PhiMap phi_map_;
839 ZoneVector<BitVector*> live_in_sets_; 845 ZoneVector<BitVector*> live_in_sets_;
840 ZoneVector<BitVector*> live_out_sets_; 846 ZoneVector<BitVector*> live_out_sets_;
841 ZoneVector<TopLevelLiveRange*> live_ranges_; 847 ZoneVector<TopLevelLiveRange*> live_ranges_;
842 ZoneVector<TopLevelLiveRange*> fixed_live_ranges_; 848 ZoneVector<TopLevelLiveRange*> fixed_live_ranges_;
843 ZoneVector<TopLevelLiveRange*> fixed_float_live_ranges_; 849 ZoneVector<TopLevelLiveRange*> fixed_float_live_ranges_;
844 ZoneVector<TopLevelLiveRange*> fixed_double_live_ranges_; 850 ZoneVector<TopLevelLiveRange*> fixed_double_live_ranges_;
851 ZoneVector<TopLevelLiveRange*> fixed_simd128_live_ranges_;
845 ZoneVector<SpillRange*> spill_ranges_; 852 ZoneVector<SpillRange*> spill_ranges_;
846 DelayedReferences delayed_references_; 853 DelayedReferences delayed_references_;
847 BitVector* assigned_registers_; 854 BitVector* assigned_registers_;
848 BitVector* assigned_double_registers_; 855 BitVector* assigned_double_registers_;
849 int virtual_register_count_; 856 int virtual_register_count_;
850 RangesWithPreassignedSlots preassigned_slot_ranges_; 857 RangesWithPreassignedSlots preassigned_slot_ranges_;
851 858
852 DISALLOW_COPY_AND_ASSIGN(RegisterAllocationData); 859 DISALLOW_COPY_AND_ASSIGN(RegisterAllocationData);
853 }; 860 };
854 861
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1176 RegisterAllocationData* const data_; 1183 RegisterAllocationData* const data_;
1177 1184
1178 DISALLOW_COPY_AND_ASSIGN(LiveRangeConnector); 1185 DISALLOW_COPY_AND_ASSIGN(LiveRangeConnector);
1179 }; 1186 };
1180 1187
1181 } // namespace compiler 1188 } // namespace compiler
1182 } // namespace internal 1189 } // namespace internal
1183 } // namespace v8 1190 } // namespace v8
1184 1191
1185 #endif // V8_REGISTER_ALLOCATOR_H_ 1192 #endif // V8_REGISTER_ALLOCATOR_H_
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