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Side by Side Diff: src/compiler/register-allocator.cc

Issue 2092103004: [Turbofan] Add Simd128 registers to RegisterConfiguration. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Add simd128 mask. Created 4 years, 5 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/base/adapters.h" 5 #include "src/base/adapters.h"
6 #include "src/compiler/linkage.h" 6 #include "src/compiler/linkage.h"
7 #include "src/compiler/register-allocator.h" 7 #include "src/compiler/register-allocator.h"
8 #include "src/string-stream.h" 8 #include "src/string-stream.h"
9 9
10 namespace v8 { 10 namespace v8 {
(...skipping 1357 matching lines...) Expand 10 before | Expand all | Expand 10 after
1368 live_in_sets_(code->InstructionBlockCount(), nullptr, allocation_zone()), 1368 live_in_sets_(code->InstructionBlockCount(), nullptr, allocation_zone()),
1369 live_out_sets_(code->InstructionBlockCount(), nullptr, allocation_zone()), 1369 live_out_sets_(code->InstructionBlockCount(), nullptr, allocation_zone()),
1370 live_ranges_(code->VirtualRegisterCount() * 2, nullptr, 1370 live_ranges_(code->VirtualRegisterCount() * 2, nullptr,
1371 allocation_zone()), 1371 allocation_zone()),
1372 fixed_live_ranges_(this->config()->num_general_registers(), nullptr, 1372 fixed_live_ranges_(this->config()->num_general_registers(), nullptr,
1373 allocation_zone()), 1373 allocation_zone()),
1374 fixed_float_live_ranges_(this->config()->num_float_registers(), nullptr, 1374 fixed_float_live_ranges_(this->config()->num_float_registers(), nullptr,
1375 allocation_zone()), 1375 allocation_zone()),
1376 fixed_double_live_ranges_(this->config()->num_double_registers(), nullptr, 1376 fixed_double_live_ranges_(this->config()->num_double_registers(), nullptr,
1377 allocation_zone()), 1377 allocation_zone()),
1378 fixed_simd128_live_ranges_(this->config()->num_simd128_registers(),
1379 nullptr, allocation_zone()),
1378 spill_ranges_(code->VirtualRegisterCount(), nullptr, allocation_zone()), 1380 spill_ranges_(code->VirtualRegisterCount(), nullptr, allocation_zone()),
1379 delayed_references_(allocation_zone()), 1381 delayed_references_(allocation_zone()),
1380 assigned_registers_(nullptr), 1382 assigned_registers_(nullptr),
1381 assigned_double_registers_(nullptr), 1383 assigned_double_registers_(nullptr),
1382 virtual_register_count_(code->VirtualRegisterCount()), 1384 virtual_register_count_(code->VirtualRegisterCount()),
1383 preassigned_slot_ranges_(zone) { 1385 preassigned_slot_ranges_(zone) {
1384 assigned_registers_ = new (code_zone()) 1386 assigned_registers_ = new (code_zone())
1385 BitVector(this->config()->num_general_registers(), code_zone()); 1387 BitVector(this->config()->num_general_registers(), code_zone());
1386 assigned_double_registers_ = new (code_zone()) 1388 assigned_double_registers_ = new (code_zone())
1387 BitVector(this->config()->num_double_registers(), code_zone()); 1389 BitVector(this->config()->num_double_registers(), code_zone());
(...skipping 157 matching lines...) Expand 10 before | Expand all | Expand 10 after
1545 DCHECK(!range->IsSplinter()); 1547 DCHECK(!range->IsSplinter());
1546 SpillRange* spill_range = 1548 SpillRange* spill_range =
1547 new (allocation_zone()) SpillRange(range, allocation_zone()); 1549 new (allocation_zone()) SpillRange(range, allocation_zone());
1548 return spill_range; 1550 return spill_range;
1549 } 1551 }
1550 1552
1551 void RegisterAllocationData::MarkAllocated(MachineRepresentation rep, 1553 void RegisterAllocationData::MarkAllocated(MachineRepresentation rep,
1552 int index) { 1554 int index) {
1553 switch (rep) { 1555 switch (rep) {
1554 case MachineRepresentation::kFloat32: 1556 case MachineRepresentation::kFloat32:
1557 case MachineRepresentation::kSimd128:
1555 if (kSimpleFPAliasing) { 1558 if (kSimpleFPAliasing) {
1556 assigned_double_registers_->Add(index); 1559 assigned_double_registers_->Add(index);
1557 } else { 1560 } else {
1558 int alias_base_index = -1; 1561 int alias_base_index = -1;
1559 int aliases = config()->GetAliases( 1562 int aliases = config()->GetAliases(
1560 rep, index, MachineRepresentation::kFloat64, &alias_base_index); 1563 rep, index, MachineRepresentation::kFloat64, &alias_base_index);
1561 while (aliases--) { 1564 while (aliases--) {
1562 int aliased_reg = alias_base_index + aliases; 1565 int aliased_reg = alias_base_index + aliases;
1563 assigned_double_registers_->Add(aliased_reg); 1566 assigned_double_registers_->Add(aliased_reg);
1564 } 1567 }
(...skipping 316 matching lines...) Expand 10 before | Expand all | Expand 10 after
1881 BitVector::Iterator iterator(live_out); 1884 BitVector::Iterator iterator(live_out);
1882 while (!iterator.Done()) { 1885 while (!iterator.Done()) {
1883 int operand_index = iterator.Current(); 1886 int operand_index = iterator.Current();
1884 TopLevelLiveRange* range = data()->GetOrCreateLiveRangeFor(operand_index); 1887 TopLevelLiveRange* range = data()->GetOrCreateLiveRangeFor(operand_index);
1885 range->AddUseInterval(start, end, allocation_zone()); 1888 range->AddUseInterval(start, end, allocation_zone());
1886 iterator.Advance(); 1889 iterator.Advance();
1887 } 1890 }
1888 } 1891 }
1889 1892
1890 int LiveRangeBuilder::FixedFPLiveRangeID(int index, MachineRepresentation rep) { 1893 int LiveRangeBuilder::FixedFPLiveRangeID(int index, MachineRepresentation rep) {
1894 int result = -index - 1;
1891 switch (rep) { 1895 switch (rep) {
1896 case MachineRepresentation::kSimd128:
1897 result -= config()->num_float_registers();
1898 // Fall through.
1892 case MachineRepresentation::kFloat32: 1899 case MachineRepresentation::kFloat32:
1893 return -index - 1 - config()->num_general_registers(); 1900 result -= config()->num_double_registers();
1901 // Fall through.
1894 case MachineRepresentation::kFloat64: 1902 case MachineRepresentation::kFloat64:
1895 return -index - 1 - config()->num_general_registers() - 1903 result -= config()->num_general_registers();
1896 config()->num_float_registers(); 1904 break;
1897 default: 1905 default:
1906 UNREACHABLE();
1898 break; 1907 break;
1899 } 1908 }
1900 UNREACHABLE(); 1909 return result;
1901 return 0;
1902 } 1910 }
1903 1911
1904 TopLevelLiveRange* LiveRangeBuilder::FixedLiveRangeFor(int index) { 1912 TopLevelLiveRange* LiveRangeBuilder::FixedLiveRangeFor(int index) {
1905 DCHECK(index < config()->num_general_registers()); 1913 DCHECK(index < config()->num_general_registers());
1906 TopLevelLiveRange* result = data()->fixed_live_ranges()[index]; 1914 TopLevelLiveRange* result = data()->fixed_live_ranges()[index];
1907 if (result == nullptr) { 1915 if (result == nullptr) {
1908 MachineRepresentation rep = InstructionSequence::DefaultRepresentation(); 1916 MachineRepresentation rep = InstructionSequence::DefaultRepresentation();
1909 result = data()->NewLiveRange(FixedLiveRangeID(index), rep); 1917 result = data()->NewLiveRange(FixedLiveRangeID(index), rep);
1910 DCHECK(result->IsFixed()); 1918 DCHECK(result->IsFixed());
1911 result->set_assigned_register(index); 1919 result->set_assigned_register(index);
1912 data()->MarkAllocated(rep, index); 1920 data()->MarkAllocated(rep, index);
1913 data()->fixed_live_ranges()[index] = result; 1921 data()->fixed_live_ranges()[index] = result;
1914 } 1922 }
1915 return result; 1923 return result;
1916 } 1924 }
1917 1925
1918 TopLevelLiveRange* LiveRangeBuilder::FixedFPLiveRangeFor( 1926 TopLevelLiveRange* LiveRangeBuilder::FixedFPLiveRangeFor(
1919 int index, MachineRepresentation rep) { 1927 int index, MachineRepresentation rep) {
1920 TopLevelLiveRange* result = nullptr; 1928 TopLevelLiveRange* result = nullptr;
1921 if (rep == MachineRepresentation::kFloat64) { 1929 switch (rep) {
1922 DCHECK(index < config()->num_double_registers()); 1930 case MachineRepresentation::kFloat32:
1923 result = data()->fixed_double_live_ranges()[index]; 1931 DCHECK(rep == MachineRepresentation::kFloat32);
1924 if (result == nullptr) { 1932 DCHECK(index < config()->num_float_registers());
1925 result = data()->NewLiveRange(FixedFPLiveRangeID(index, rep), rep); 1933 result = data()->fixed_float_live_ranges()[index];
1926 DCHECK(result->IsFixed()); 1934 if (result == nullptr) {
1927 result->set_assigned_register(index); 1935 result = data()->NewLiveRange(FixedFPLiveRangeID(index, rep), rep);
1928 data()->MarkAllocated(rep, index); 1936 DCHECK(result->IsFixed());
1929 data()->fixed_double_live_ranges()[index] = result; 1937 result->set_assigned_register(index);
1930 } 1938 data()->MarkAllocated(rep, index);
1931 } else { 1939 data()->fixed_float_live_ranges()[index] = result;
1932 DCHECK(rep == MachineRepresentation::kFloat32); 1940 }
1933 DCHECK(index < config()->num_float_registers()); 1941 break;
1934 result = data()->fixed_float_live_ranges()[index]; 1942 case MachineRepresentation::kFloat64:
1935 if (result == nullptr) { 1943 DCHECK(index < config()->num_double_registers());
1936 result = data()->NewLiveRange(FixedFPLiveRangeID(index, rep), rep); 1944 result = data()->fixed_double_live_ranges()[index];
1937 DCHECK(result->IsFixed()); 1945 if (result == nullptr) {
1938 result->set_assigned_register(index); 1946 result = data()->NewLiveRange(FixedFPLiveRangeID(index, rep), rep);
1939 data()->MarkAllocated(rep, index); 1947 DCHECK(result->IsFixed());
1940 data()->fixed_float_live_ranges()[index] = result; 1948 result->set_assigned_register(index);
1941 } 1949 data()->MarkAllocated(rep, index);
1950 data()->fixed_double_live_ranges()[index] = result;
1951 }
1952 break;
1953 case MachineRepresentation::kSimd128:
1954 DCHECK(index < config()->num_simd128_registers());
1955 result = data()->fixed_simd128_live_ranges()[index];
1956 if (result == nullptr) {
1957 result = data()->NewLiveRange(FixedFPLiveRangeID(index, rep), rep);
1958 DCHECK(result->IsFixed());
1959 result->set_assigned_register(index);
1960 data()->MarkAllocated(rep, index);
1961 data()->fixed_simd128_live_ranges()[index] = result;
1962 }
1963 break;
1964 default:
1965 UNREACHABLE();
1966 break;
1942 } 1967 }
1943 return result; 1968 return result;
1944 } 1969 }
1945 1970
1946 TopLevelLiveRange* LiveRangeBuilder::LiveRangeFor(InstructionOperand* operand) { 1971 TopLevelLiveRange* LiveRangeBuilder::LiveRangeFor(InstructionOperand* operand) {
1947 if (operand->IsUnallocated()) { 1972 if (operand->IsUnallocated()) {
1948 return data()->GetOrCreateLiveRangeFor( 1973 return data()->GetOrCreateLiveRangeFor(
1949 UnallocatedOperand::cast(operand)->virtual_register()); 1974 UnallocatedOperand::cast(operand)->virtual_register());
1950 } else if (operand->IsConstant()) { 1975 } else if (operand->IsConstant()) {
1951 return data()->GetOrCreateLiveRangeFor( 1976 return data()->GetOrCreateLiveRangeFor(
(...skipping 121 matching lines...) Expand 10 before | Expand all | Expand 10 after
2073 for (int i = 0; i < config()->num_allocatable_float_registers(); ++i) { 2098 for (int i = 0; i < config()->num_allocatable_float_registers(); ++i) {
2074 int code = config()->GetAllocatableFloatCode(i); 2099 int code = config()->GetAllocatableFloatCode(i);
2075 if (!IsOutputFPRegisterOf(instr, MachineRepresentation::kFloat32, 2100 if (!IsOutputFPRegisterOf(instr, MachineRepresentation::kFloat32,
2076 code)) { 2101 code)) {
2077 TopLevelLiveRange* range = 2102 TopLevelLiveRange* range =
2078 FixedFPLiveRangeFor(code, MachineRepresentation::kFloat32); 2103 FixedFPLiveRangeFor(code, MachineRepresentation::kFloat32);
2079 range->AddUseInterval(curr_position, curr_position.End(), 2104 range->AddUseInterval(curr_position, curr_position.End(),
2080 allocation_zone()); 2105 allocation_zone());
2081 } 2106 }
2082 } 2107 }
2108 for (int i = 0; i < config()->num_allocatable_simd128_registers(); ++i) {
2109 int code = config()->GetAllocatableSimd128Code(i);
2110 if (!IsOutputFPRegisterOf(instr, MachineRepresentation::kSimd128,
2111 code)) {
2112 TopLevelLiveRange* range =
2113 FixedFPLiveRangeFor(code, MachineRepresentation::kSimd128);
2114 range->AddUseInterval(curr_position, curr_position.End(),
2115 allocation_zone());
2116 }
2117 }
2083 } 2118 }
2084 2119
2085 for (size_t i = 0; i < instr->InputCount(); i++) { 2120 for (size_t i = 0; i < instr->InputCount(); i++) {
2086 InstructionOperand* input = instr->InputAt(i); 2121 InstructionOperand* input = instr->InputAt(i);
2087 if (input->IsImmediate() || input->IsExplicit()) { 2122 if (input->IsImmediate() || input->IsExplicit()) {
2088 continue; // Ignore immediates and explicitly reserved registers. 2123 continue; // Ignore immediates and explicitly reserved registers.
2089 } 2124 }
2090 LifetimePosition use_pos; 2125 LifetimePosition use_pos;
2091 if (input->IsUnallocated() && 2126 if (input->IsUnallocated() &&
2092 UnallocatedOperand::cast(input)->IsUsedAtStart()) { 2127 UnallocatedOperand::cast(input)->IsUsedAtStart()) {
(...skipping 715 matching lines...) Expand 10 before | Expand all | Expand 10 after
2808 2843
2809 void LinearScanAllocator::InactiveToActive(LiveRange* range) { 2844 void LinearScanAllocator::InactiveToActive(LiveRange* range) {
2810 RemoveElement(&inactive_live_ranges(), range); 2845 RemoveElement(&inactive_live_ranges(), range);
2811 active_live_ranges().push_back(range); 2846 active_live_ranges().push_back(range);
2812 TRACE("Moving live range %d:%d from inactive to active\n", 2847 TRACE("Moving live range %d:%d from inactive to active\n",
2813 range->TopLevel()->vreg(), range->relative_id()); 2848 range->TopLevel()->vreg(), range->relative_id());
2814 } 2849 }
2815 2850
2816 2851
2817 bool LinearScanAllocator::TryAllocateFreeReg(LiveRange* current) { 2852 bool LinearScanAllocator::TryAllocateFreeReg(LiveRange* current) {
2853 MachineRepresentation rep = current->representation();
2818 int num_regs = num_registers(); 2854 int num_regs = num_registers();
2819 int num_codes = num_allocatable_registers(); 2855 int num_codes = num_allocatable_registers();
2820 const int* codes = allocatable_register_codes(); 2856 const int* codes = allocatable_register_codes();
2821 if (!kSimpleFPAliasing && 2857 if (!kSimpleFPAliasing) {
2822 (current->representation() == MachineRepresentation::kFloat32)) { 2858 if (rep == MachineRepresentation::kFloat32) {
2823 num_regs = data()->config()->num_float_registers(); 2859 num_regs = data()->config()->num_float_registers();
2824 num_codes = data()->config()->num_allocatable_float_registers(); 2860 num_codes = data()->config()->num_allocatable_float_registers();
2825 codes = data()->config()->allocatable_float_codes(); 2861 codes = data()->config()->allocatable_float_codes();
2862 } else if (rep == MachineRepresentation::kSimd128) {
2863 num_regs = data()->config()->num_simd128_registers();
2864 num_codes = data()->config()->num_allocatable_simd128_registers();
2865 codes = data()->config()->allocatable_simd128_codes();
2866 }
2826 } 2867 }
2868
2827 LifetimePosition free_until_pos[RegisterConfiguration::kMaxFPRegisters]; 2869 LifetimePosition free_until_pos[RegisterConfiguration::kMaxFPRegisters];
2828 for (int i = 0; i < num_regs; i++) { 2870 for (int i = 0; i < num_regs; i++) {
2829 free_until_pos[i] = LifetimePosition::MaxPosition(); 2871 free_until_pos[i] = LifetimePosition::MaxPosition();
2830 } 2872 }
2831 2873
2832 for (LiveRange* cur_active : active_live_ranges()) { 2874 for (LiveRange* cur_active : active_live_ranges()) {
2833 int cur_reg = cur_active->assigned_register(); 2875 int cur_reg = cur_active->assigned_register();
2834 if (kSimpleFPAliasing || mode() == GENERAL_REGISTERS) { 2876 if (kSimpleFPAliasing || mode() == GENERAL_REGISTERS) {
2835 free_until_pos[cur_reg] = LifetimePosition::GapFromInstructionIndex(0); 2877 free_until_pos[cur_reg] = LifetimePosition::GapFromInstructionIndex(0);
2836 TRACE("Register %s is free until pos %d (1)\n", RegisterName(cur_reg), 2878 TRACE("Register %s is free until pos %d (1)\n", RegisterName(cur_reg),
2837 LifetimePosition::GapFromInstructionIndex(0).value()); 2879 LifetimePosition::GapFromInstructionIndex(0).value());
2838 } else { 2880 } else {
2839 int alias_base_index = -1; 2881 int alias_base_index = -1;
2840 int aliases = data()->config()->GetAliases( 2882 int aliases = data()->config()->GetAliases(
2841 cur_active->representation(), cur_reg, current->representation(), 2883 cur_active->representation(), cur_reg, rep, &alias_base_index);
2842 &alias_base_index);
2843 while (aliases--) { 2884 while (aliases--) {
2844 int aliased_reg = alias_base_index + aliases; 2885 int aliased_reg = alias_base_index + aliases;
2845 free_until_pos[aliased_reg] = 2886 free_until_pos[aliased_reg] =
2846 LifetimePosition::GapFromInstructionIndex(0); 2887 LifetimePosition::GapFromInstructionIndex(0);
2847 } 2888 }
2848 } 2889 }
2849 } 2890 }
2850 2891
2851 for (LiveRange* cur_inactive : inactive_live_ranges()) { 2892 for (LiveRange* cur_inactive : inactive_live_ranges()) {
2852 DCHECK(cur_inactive->End() > current->Start()); 2893 DCHECK(cur_inactive->End() > current->Start());
2853 LifetimePosition next_intersection = 2894 LifetimePosition next_intersection =
2854 cur_inactive->FirstIntersection(current); 2895 cur_inactive->FirstIntersection(current);
2855 if (!next_intersection.IsValid()) continue; 2896 if (!next_intersection.IsValid()) continue;
2856 int cur_reg = cur_inactive->assigned_register(); 2897 int cur_reg = cur_inactive->assigned_register();
2857 if (kSimpleFPAliasing || mode() == GENERAL_REGISTERS) { 2898 if (kSimpleFPAliasing || mode() == GENERAL_REGISTERS) {
2858 free_until_pos[cur_reg] = Min(free_until_pos[cur_reg], next_intersection); 2899 free_until_pos[cur_reg] = Min(free_until_pos[cur_reg], next_intersection);
2859 TRACE("Register %s is free until pos %d (2)\n", RegisterName(cur_reg), 2900 TRACE("Register %s is free until pos %d (2)\n", RegisterName(cur_reg),
2860 Min(free_until_pos[cur_reg], next_intersection).value()); 2901 Min(free_until_pos[cur_reg], next_intersection).value());
2861 } else { 2902 } else {
2862 int alias_base_index = -1; 2903 int alias_base_index = -1;
2863 int aliases = data()->config()->GetAliases( 2904 int aliases = data()->config()->GetAliases(
2864 cur_inactive->representation(), cur_reg, current->representation(), 2905 cur_inactive->representation(), cur_reg, rep, &alias_base_index);
2865 &alias_base_index);
2866 while (aliases--) { 2906 while (aliases--) {
2867 int aliased_reg = alias_base_index + aliases; 2907 int aliased_reg = alias_base_index + aliases;
2868 free_until_pos[aliased_reg] = 2908 free_until_pos[aliased_reg] =
2869 Min(free_until_pos[aliased_reg], next_intersection); 2909 Min(free_until_pos[aliased_reg], next_intersection);
2870 } 2910 }
2871 } 2911 }
2872 } 2912 }
2873 2913
2874 int hint_register; 2914 int hint_register;
2875 if (current->FirstHintPosition(&hint_register) != nullptr) { 2915 if (current->FirstHintPosition(&hint_register) != nullptr) {
(...skipping 49 matching lines...) Expand 10 before | Expand all | Expand 10 after
2925 2965
2926 void LinearScanAllocator::AllocateBlockedReg(LiveRange* current) { 2966 void LinearScanAllocator::AllocateBlockedReg(LiveRange* current) {
2927 UsePosition* register_use = current->NextRegisterPosition(current->Start()); 2967 UsePosition* register_use = current->NextRegisterPosition(current->Start());
2928 if (register_use == nullptr) { 2968 if (register_use == nullptr) {
2929 // There is no use in the current live range that requires a register. 2969 // There is no use in the current live range that requires a register.
2930 // We can just spill it. 2970 // We can just spill it.
2931 Spill(current); 2971 Spill(current);
2932 return; 2972 return;
2933 } 2973 }
2934 2974
2975 MachineRepresentation rep = current->representation();
2935 int num_regs = num_registers(); 2976 int num_regs = num_registers();
2936 int num_codes = num_allocatable_registers(); 2977 int num_codes = num_allocatable_registers();
2937 const int* codes = allocatable_register_codes(); 2978 const int* codes = allocatable_register_codes();
2938 if (!kSimpleFPAliasing && 2979 if (!kSimpleFPAliasing) {
2939 (current->representation() == MachineRepresentation::kFloat32)) { 2980 if (rep == MachineRepresentation::kFloat32) {
2940 num_regs = data()->config()->num_float_registers(); 2981 num_regs = data()->config()->num_float_registers();
2941 num_codes = data()->config()->num_allocatable_float_registers(); 2982 num_codes = data()->config()->num_allocatable_float_registers();
2942 codes = data()->config()->allocatable_float_codes(); 2983 codes = data()->config()->allocatable_float_codes();
2984 } else if (rep == MachineRepresentation::kSimd128) {
2985 num_regs = data()->config()->num_simd128_registers();
2986 num_codes = data()->config()->num_allocatable_simd128_registers();
2987 codes = data()->config()->allocatable_simd128_codes();
2988 }
2943 } 2989 }
2944 2990
2945 LifetimePosition use_pos[RegisterConfiguration::kMaxFPRegisters]; 2991 LifetimePosition use_pos[RegisterConfiguration::kMaxFPRegisters];
2946 LifetimePosition block_pos[RegisterConfiguration::kMaxFPRegisters]; 2992 LifetimePosition block_pos[RegisterConfiguration::kMaxFPRegisters];
2947 for (int i = 0; i < num_regs; i++) { 2993 for (int i = 0; i < num_regs; i++) {
2948 use_pos[i] = block_pos[i] = LifetimePosition::MaxPosition(); 2994 use_pos[i] = block_pos[i] = LifetimePosition::MaxPosition();
2949 } 2995 }
2950 2996
2951 for (LiveRange* range : active_live_ranges()) { 2997 for (LiveRange* range : active_live_ranges()) {
2952 int cur_reg = range->assigned_register(); 2998 int cur_reg = range->assigned_register();
2953 bool is_fixed_or_cant_spill = 2999 bool is_fixed_or_cant_spill =
2954 range->TopLevel()->IsFixed() || !range->CanBeSpilled(current->Start()); 3000 range->TopLevel()->IsFixed() || !range->CanBeSpilled(current->Start());
2955 if (kSimpleFPAliasing || mode() == GENERAL_REGISTERS) { 3001 if (kSimpleFPAliasing || mode() == GENERAL_REGISTERS) {
2956 if (is_fixed_or_cant_spill) { 3002 if (is_fixed_or_cant_spill) {
2957 block_pos[cur_reg] = use_pos[cur_reg] = 3003 block_pos[cur_reg] = use_pos[cur_reg] =
2958 LifetimePosition::GapFromInstructionIndex(0); 3004 LifetimePosition::GapFromInstructionIndex(0);
2959 } else { 3005 } else {
2960 UsePosition* next_use = 3006 UsePosition* next_use =
2961 range->NextUsePositionRegisterIsBeneficial(current->Start()); 3007 range->NextUsePositionRegisterIsBeneficial(current->Start());
2962 if (next_use == nullptr) { 3008 if (next_use == nullptr) {
2963 use_pos[cur_reg] = range->End(); 3009 use_pos[cur_reg] = range->End();
2964 } else { 3010 } else {
2965 use_pos[cur_reg] = next_use->pos(); 3011 use_pos[cur_reg] = next_use->pos();
2966 } 3012 }
2967 } 3013 }
2968 } else { 3014 } else {
2969 int alias_base_index = -1; 3015 int alias_base_index = -1;
2970 int aliases = data()->config()->GetAliases( 3016 int aliases = data()->config()->GetAliases(
2971 range->representation(), cur_reg, current->representation(), 3017 range->representation(), cur_reg, rep, &alias_base_index);
2972 &alias_base_index);
2973 while (aliases--) { 3018 while (aliases--) {
2974 int aliased_reg = alias_base_index + aliases; 3019 int aliased_reg = alias_base_index + aliases;
2975 if (is_fixed_or_cant_spill) { 3020 if (is_fixed_or_cant_spill) {
2976 block_pos[aliased_reg] = use_pos[aliased_reg] = 3021 block_pos[aliased_reg] = use_pos[aliased_reg] =
2977 LifetimePosition::GapFromInstructionIndex(0); 3022 LifetimePosition::GapFromInstructionIndex(0);
2978 } else { 3023 } else {
2979 UsePosition* next_use = 3024 UsePosition* next_use =
2980 range->NextUsePositionRegisterIsBeneficial(current->Start()); 3025 range->NextUsePositionRegisterIsBeneficial(current->Start());
2981 if (next_use == nullptr) { 3026 if (next_use == nullptr) {
2982 use_pos[aliased_reg] = range->End(); 3027 use_pos[aliased_reg] = range->End();
(...skipping 14 matching lines...) Expand all
2997 if (kSimpleFPAliasing || mode() == GENERAL_REGISTERS) { 3042 if (kSimpleFPAliasing || mode() == GENERAL_REGISTERS) {
2998 if (is_fixed) { 3043 if (is_fixed) {
2999 block_pos[cur_reg] = Min(block_pos[cur_reg], next_intersection); 3044 block_pos[cur_reg] = Min(block_pos[cur_reg], next_intersection);
3000 use_pos[cur_reg] = Min(block_pos[cur_reg], use_pos[cur_reg]); 3045 use_pos[cur_reg] = Min(block_pos[cur_reg], use_pos[cur_reg]);
3001 } else { 3046 } else {
3002 use_pos[cur_reg] = Min(use_pos[cur_reg], next_intersection); 3047 use_pos[cur_reg] = Min(use_pos[cur_reg], next_intersection);
3003 } 3048 }
3004 } else { 3049 } else {
3005 int alias_base_index = -1; 3050 int alias_base_index = -1;
3006 int aliases = data()->config()->GetAliases( 3051 int aliases = data()->config()->GetAliases(
3007 range->representation(), cur_reg, current->representation(), 3052 range->representation(), cur_reg, rep, &alias_base_index);
3008 &alias_base_index);
3009 while (aliases--) { 3053 while (aliases--) {
3010 int aliased_reg = alias_base_index + aliases; 3054 int aliased_reg = alias_base_index + aliases;
3011 if (is_fixed) { 3055 if (is_fixed) {
3012 block_pos[aliased_reg] = 3056 block_pos[aliased_reg] =
3013 Min(block_pos[aliased_reg], next_intersection); 3057 Min(block_pos[aliased_reg], next_intersection);
3014 use_pos[aliased_reg] = 3058 use_pos[aliased_reg] =
3015 Min(block_pos[aliased_reg], use_pos[aliased_reg]); 3059 Min(block_pos[aliased_reg], use_pos[aliased_reg]);
3016 } else { 3060 } else {
3017 use_pos[aliased_reg] = Min(use_pos[aliased_reg], next_intersection); 3061 use_pos[aliased_reg] = Min(use_pos[aliased_reg], next_intersection);
3018 } 3062 }
(...skipping 747 matching lines...) Expand 10 before | Expand all | Expand 10 after
3766 } 3810 }
3767 } 3811 }
3768 } 3812 }
3769 } 3813 }
3770 } 3814 }
3771 3815
3772 3816
3773 } // namespace compiler 3817 } // namespace compiler
3774 } // namespace internal 3818 } // namespace internal
3775 } // namespace v8 3819 } // namespace v8
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