Fix '[tests] Don't test moves between different reps in test-gap-resolver.cc'

src/assembler.cc

 // Copyright (c) 1994-2006 Sun Microsystems Inc.
 // All Rights Reserved.
 //
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 // - Redistributions of source code must retain the above copyright notice,
 // this list of conditions and the following disclaimer.
 //
@@ skipping 105 matching lines @@
 // -----------------------------------------------------------------------------
 // Common register code.
 
 const char* Register::ToString() {
   // This is the mapping of allocation indices to registers.
   DCHECK(reg_code >= 0 && reg_code < kNumRegisters);
   return RegisterConfiguration::ArchDefault(RegisterConfiguration::CRANKSHAFT)
       ->GetGeneralRegisterName(reg_code);
 }
 
-
-bool Register::IsAllocatable() const {
+bool Register::IsAllocatable(
+    RegisterConfiguration::CompilerSelector compiler) const {
   return ((1 << reg_code) &
-          RegisterConfiguration::ArchDefault(RegisterConfiguration::CRANKSHAFT)
+          RegisterConfiguration::ArchDefault(compiler)
               ->allocatable_general_codes_mask()) != 0;
 }
 
 const char* DoubleRegister::ToString() {
   // This is the mapping of allocation indices to registers.
   DCHECK(reg_code >= 0 && reg_code < kMaxNumRegisters);
   return RegisterConfiguration::ArchDefault(RegisterConfiguration::CRANKSHAFT)
       ->GetDoubleRegisterName(reg_code);
 }
 
-
-bool DoubleRegister::IsAllocatable() const {
+bool DoubleRegister::IsAllocatable(
+    RegisterConfiguration::CompilerSelector compiler) const {
   return ((1 << reg_code) &
-          RegisterConfiguration::ArchDefault(RegisterConfiguration::CRANKSHAFT)
+          RegisterConfiguration::ArchDefault(compiler)
               ->allocatable_double_codes_mask()) != 0;
 }
 
 // FloatRegister is only a distinct type on ARM. On all other platforms it's
 // typedef'ed to DoubleRegister.
 #if V8_TARGET_ARCH_ARM
 const char* FloatRegister::ToString() {
   // This is the mapping of allocation indices to registers.
   DCHECK(reg_code >= 0 && reg_code < kMaxNumRegisters);
   return RegisterConfiguration::ArchDefault(RegisterConfiguration::CRANKSHAFT)
       ->GetFloatRegisterName(reg_code);
 }
 
-bool FloatRegister::IsAllocatable() const {
+bool FloatRegister::IsAllocatable(
+    RegisterConfiguration::CompilerSelector compiler) const {
   // TODO(bbudge) Update this once RegisterConfigutation handles aliasing.
   return ((1 << reg_code) &
           RegisterConfiguration::ArchDefault(RegisterConfiguration::CRANKSHAFT)
               ->allocatable_double_codes_mask()) != 0;
 }
 #endif  // V8_TARGET_ARCH_ARM
 
 // -----------------------------------------------------------------------------
 // Common double constants.
 
@@ skipping 1902 matching lines @@
 
 
 void Assembler::DataAlign(int m) {
   DCHECK(m >= 2 && base::bits::IsPowerOfTwo32(m));
   while ((pc_offset() & (m - 1)) != 0) {
     db(0);
   }
 }
 }  // namespace internal
 }  // namespace v8