[mips] implement enough bytecodes to run hello.dart

src/vm/interpreter_mips.cc

 // Copyright (c) 2016, the Dartino project authors. Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE.md file.
 
 #if defined(DARTINO_TARGET_MIPS)
 
 #include "src/shared/bytecodes.h"
 #include "src/shared/names.h"
 #include "src/shared/selectors.h"
 
@@ skipping 74 matching lines @@
 #undef V
 }
 
 class InterpreterGeneratorMIPS: public InterpreterGenerator {
  public:
   explicit InterpreterGeneratorMIPS(Assembler* assembler)
       : InterpreterGenerator(assembler) { }
 
   // Registers
   // ---------
-  // s0: current process
-  // s1: bytecode pointer
-  // s2: stack pointer
-  // s4: null
-  // s6: true
-  // s7: false
-
+  // S0: current process
+  // S1: bytecode pointer
+  // S2: stack pointer (top)
+  // S4: null
+  // S6: program
+  // S7: dispatch table
   virtual void GeneratePrologue();
   virtual void GenerateEpilogue();
 
   virtual void GenerateMethodEntry();
 
   virtual void GenerateBytecodePrologue(const char* name);
   virtual void GenerateDebugAtBytecode();
 
   virtual void DoLoadLocal0();
   virtual void DoLoadLocal1();
@@ skipping 126 matching lines @@
   Label done_;
   Label done_state_saved_;
   Label check_stack_overflow_;
   Label check_stack_overflow_0_;
   Label gc_;
   Label intrinsic_failure_;
   Label interpreter_entry_;
   int spill_size_;
   // Used in GeneratePrologue/Epilogue, S0-S7 + RA + FP.
   static const int kSaveFrameSize = 10;
+  static const int kFalseOffset = 8;
+  static const int kTrueOffset = 16;
 
   void LoadLocal(Register reg, int index);
   void StoreLocal(Register reg, int index);
 
   void Push(Register reg);
   void Pop(Register reg);
   void Drop(int n);
   void Drop(Register reg);
   void DropNAndSetTop(int dropping_slots, Register reg);
 
@@ skipping 32 matching lines @@
   void InvokeBitXor(const char* fallback);
   void InvokeBitShr(const char* fallback);
   void InvokeBitShl(const char* fallback);
 
   void InvokeMethodUnfold(bool test);
   void InvokeMethod(bool test);
 
   void InvokeNative(bool yield, bool safepoint);
   void InvokeStatic();
 
-  void ConditionalStore(Register cmp, Register reg_if_eq, Register reg_if_ne,
-                        const Address& address);
+  void AddIf(Register reg1, Register reg2, Condition cond,
+             Register reg, int immediate);
+  void ToBoolean(Register reg1, Register reg2, Condition cond, Register reg);
+  void LoadFalse(Register reg);
+  void LoadTrue(Register reg);
 
   void CheckStackOverflow(int size);
 
   void Dispatch(int size);
 
   void SaveState(Label* resume);
   void RestoreState();
 
   void ShiftAddJump(Register reg1, Register reg2, int imm);
   void ShiftAddLoad(Register reg1, Register reg2, Register reg3, int imm);
@@ skipping 108 matching lines @@
   __ B(NEQ, V0, T0, &overflow);
   __ b(&done_);
   __ ori(V0, ZR, Immediate(Interpreter::kBreakpoint));  // Delay-slot.
 
   __ Bind(&stay_fast);
   Dispatch(0);
 
   __ Bind(&overflow);
   Label throw_resume;
   SaveState(&throw_resume);
-  __ lw(S3, Address(S0, Process::kProgramOffset));
-  __ lw(S3, Address(S3, Program::kStackOverflowErrorOffset));
+  __ lw(S3, Address(S6, Program::kStackOverflowErrorOffset));
   DoThrowAfterSaveState(&throw_resume);
 
   // Intrinsic failure: Just invoke the method.
   __ Bind(&intrinsic_failure_);
   __ la(T9, "InterpreterMethodEntry");
   __ Jr(T9);
 }
 
 void InterpreterGeneratorMIPS::GenerateMethodEntry() {
   __ SwitchToText();
@@ skipping 43 matching lines @@
   Dispatch(kLoadLocal0Length);
 }
 
 void InterpreterGeneratorMIPS::DoLoadLocal1() {
   LoadLocal(A0, 1);
   Push(A0);
   Dispatch(kLoadLocal1Length);
 }
 
 void InterpreterGeneratorMIPS::DoLoadLocal2() {
+  LoadLocal(A0, 2);
+  Push(A0);
+  Dispatch(kLoadLocal2Length);
 }
 
 void InterpreterGeneratorMIPS::DoLoadLocal3() {
   LoadLocal(A0, 3);
   Push(A0);
   Dispatch(kLoadLocal3Length);
 }
 
 void InterpreterGeneratorMIPS::DoLoadLocal4() {
   LoadLocal(A0, 4);
   Push(A0);
   Dispatch(kLoadLocal4Length);
 }
 
 void InterpreterGeneratorMIPS::DoLoadLocal5() {
+  LoadLocal(A0, 5);
+  Push(A0);
+  Dispatch(kLoadLocal5Length);
 }
 
 void InterpreterGeneratorMIPS::DoLoadLocal() {
+  __ lbu(A0, Address(S1, 1));
+  ShiftAddLoad(A0, S2, A0, TIMES_WORD_SIZE);
+  Push(A0);
+  Dispatch(kLoadLocalLength);
 }
 
 void InterpreterGeneratorMIPS::DoLoadLocalWide() {
 }
 
 void InterpreterGeneratorMIPS::DoLoadBoxed() {
+  __ lbu(A0, Address(S1, 1));
+  ShiftAddLoad(A1, S2, A0, TIMES_WORD_SIZE);
+  __ lw(A0, Address(A1, Boxed::kValueOffset - HeapObject::kTag));
+  Push(A0);
+  Dispatch(kLoadBoxedLength);
 }
 
 void InterpreterGeneratorMIPS::DoLoadStatic() {
   __ lw(A0, Address(S1, 1));
   __ lw(A1, Address(S0, Process::kStaticsOffset));
   __ addiu(A1, A1, Immediate(Array::kSize - HeapObject::kTag));
   ShiftAddLoad(A0, A1, A0, TIMES_WORD_SIZE);
   Push(A0);
   Dispatch(kLoadStaticLength);
 }
@@ skipping 24 matching lines @@
   __ lw(A0, Address(A0,
             Initializer::kFunctionOffset - HeapObject::kTag));  // Delay-slot.
   RestoreByteCodePointer(A2);
 
   __ Bind(&done);
   Push(A0);
   Dispatch(kLoadStaticInitLength);
 }
 
 void InterpreterGeneratorMIPS::DoLoadField() {
+  __ lbu(A1, Address(S1, 1));
+  LoadLocal(A0, 0);
+  __ addiu(A0, A0, Immediate(Instance::kSize - HeapObject::kTag));
+  ShiftAddLoad(A0, A0, A1, TIMES_WORD_SIZE);
+  StoreLocal(A0, 0);
+  Dispatch(kLoadFieldLength);
 }
 
 void InterpreterGeneratorMIPS::DoLoadFieldWide() {
 }
 
 void InterpreterGeneratorMIPS::DoLoadConst() {
   __ lw(A0, Address(S1, 1));
   ShiftAddLoad(A2, S1, A0, TIMES_1);
   Push(A2);
   Dispatch(kLoadConstLength);
 }
 
 void InterpreterGeneratorMIPS::DoStoreLocal() {
   LoadLocal(A1, 0);
   __ lbu(A0, Address(S1, 1));
   ShiftAddStore(A1, S2, A0, TIMES_WORD_SIZE);
   Dispatch(kStoreLocalLength);
 }
 
 void InterpreterGeneratorMIPS::DoStoreBoxed() {
+  LoadLocal(A2, 0);
+  __ lbu(A0, Address(S1, 1));
+  ShiftAddLoad(A1, S2, A0, TIMES_WORD_SIZE);
+  __ sw(A2, Address(A1, Boxed::kValueOffset - HeapObject::kTag));
+
+  AddToRememberedSet(A1, A2, A3);
+
+  Dispatch(kStoreBoxedLength);
 }
 
 void InterpreterGeneratorMIPS::DoStoreStatic() {
   LoadLocal(A2, 0);
   __ lw(A0, Address(S1, 1));
   __ lw(A1, Address(S0, Process::kStaticsOffset));
   __ addiu(A3, A1, Immediate(Array::kSize - HeapObject::kTag));
   ShiftAddStore(A2, A3, A0, TIMES_WORD_SIZE);
 
   AddToRememberedSet(A1, A2, A0);
 
   Dispatch(kStoreStaticLength);
 }
 
 void InterpreterGeneratorMIPS::DoStoreField() {
 }
 
 void InterpreterGeneratorMIPS::DoStoreFieldWide() {
 }
 
 void InterpreterGeneratorMIPS::DoLoadLiteralNull() {
   Push(S4);
   Dispatch(kLoadLiteralNullLength);
 }
 
 void InterpreterGeneratorMIPS::DoLoadLiteralTrue() {
+  LoadTrue(A2);
+  Push(A2);
+  Dispatch(kLoadLiteralTrueLength);
 }
 
 void InterpreterGeneratorMIPS::DoLoadLiteralFalse() {
+  LoadFalse(A2);
+  Push(A2);
+  Dispatch(kLoadLiteralFalseLength);
 }
 
 void InterpreterGeneratorMIPS::DoLoadLiteral0() {
   __ li(A0, Immediate(reinterpret_cast<int32_t>(Smi::FromWord(0))));
   Push(A0);
   Dispatch(kLoadLiteral0Length);
 }
 
 void InterpreterGeneratorMIPS::DoLoadLiteral1() {
+  __ li(A0, Immediate(reinterpret_cast<int32_t>(Smi::FromWord(1))));
+  Push(A0);
+  Dispatch(kLoadLiteral1Length);
 }
 
 void InterpreterGeneratorMIPS::DoLoadLiteral() {
   __ lbu(A0, Address(S1, 1));
   __ sll(A0, A0, Immediate(Smi::kTagSize));
   ASSERT(Smi::kTag == 0);
   Push(A0);
   Dispatch(kLoadLiteralLength);
 }
 
 void InterpreterGeneratorMIPS::DoLoadLiteralWide() {
+  ASSERT(Smi::kTag == 0);
+  __ lw(A0, Address(S1, 1));
+  __ sll(A0, A0, Immediate(Smi::kTagSize));
+  Push(A0);
+  Dispatch(kLoadLiteralWideLength);
 }
 
 void InterpreterGeneratorMIPS::DoInvokeMethodUnfold() {
 }
 
 void InterpreterGeneratorMIPS::DoInvokeMethod() {
   InvokeMethod(false);
 }
 
 void InterpreterGeneratorMIPS::DoInvokeNoSuchMethod() {
 }
 
 void InterpreterGeneratorMIPS::DoInvokeTestNoSuchMethod() {
 }
 
 void InterpreterGeneratorMIPS::DoInvokeTestUnfold() {
 }
 
 void InterpreterGeneratorMIPS::DoInvokeTest() {
+  InvokeMethod(true);
 }
 
 void InterpreterGeneratorMIPS::DoInvokeStatic() {
   InvokeStatic();
 }
 
 void InterpreterGeneratorMIPS::DoInvokeFactory() {
+  InvokeStatic();
 }
 
 void InterpreterGeneratorMIPS::DoInvokeLeafNative() {
   InvokeNative(false, false);
 }
 
 void InterpreterGeneratorMIPS::DoInvokeNative() {
+  InvokeNative(false, true);
 }
 
 void InterpreterGeneratorMIPS::DoInvokeNativeYield() {
 }
 
 void InterpreterGeneratorMIPS::DoInvokeSelector() {
   Label resume;
   SaveState(&resume);
   PrepareStack();
   __ la(T9, "HandleInvokeSelector");
@@ skipping 23 matching lines @@
 
   StoreLocal(A0, 0);
   Dispatch(kInvokeSelectorLength);
 }
 
 void InterpreterGeneratorMIPS::InvokeEq(const char* fallback) {
   InvokeCompare(fallback, EQ);
 }
 
 void InterpreterGeneratorMIPS::InvokeLt(const char* fallback) {
+  InvokeCompare(fallback, LT);
 }
 
 void InterpreterGeneratorMIPS::InvokeLe(const char* fallback) {
+  InvokeCompare(fallback, LE);
 }
 
 void InterpreterGeneratorMIPS::InvokeGt(const char* fallback) {
+  InvokeCompare(fallback, GT);
 }
 
 void InterpreterGeneratorMIPS::InvokeGe(const char* fallback) {
+  InvokeCompare(fallback, GE);
 }
 
 void InterpreterGeneratorMIPS::InvokeAdd(const char* fallback) {
   Label no_overflow;
   LoadLocal(A0, 1);
   __ andi(T0, A0, Immediate(Smi::kTagMask));
   __ B(NEQ, T0, ZR, fallback);
   LoadLocal(A1, 0);
   __ andi(T1, A1, Immediate(Smi::kTagMask));
   __ B(NEQ, T1, ZR, fallback);
 
   __ xor_(T1, A0, A1);
   __ b(LT, T1, ZR, &no_overflow);
   __ addu(T0, A0, A1);  // Delay-slot.
   __ xor_(T1, T0, A0);
-  __ slt(T1, T1, ZR);
-  __ b(NEQ, T1, ZR, fallback);
+  __ b(LT, T1, ZR, fallback);
   __ Bind(&no_overflow);
   __ move(A0, T0);  // Delay-slot.
   DropNAndSetTop(1, A0);
   Dispatch(kInvokeAddLength);
 }
 
 void InterpreterGeneratorMIPS::InvokeSub(const char* fallback) {
+  Label no_overflow;
+  LoadLocal(A0, 1);
+  __ andi(T0, A0, Immediate(Smi::kTagMask));
+  __ B(NEQ, T0, ZR, fallback);
+  LoadLocal(A1, 0);
+  __ andi(T0, A1, Immediate(Smi::kTagMask));
+  __ B(NEQ, T0, ZR, fallback);
+
+  __ xor_(T1, A0, A1);
+  __ srl(T1, T1, Immediate(31));
+  __ b(EQ, T1, ZR, &no_overflow);
+  __ subu(T0, A0, A1);  // Delay-slot.
+  __ xor_(T1, T0, A0);
+  __ b(LT, T1, ZR, fallback);
+  __ Bind(&no_overflow);
+  __ move(A0, T0);  // Delay-slot.
+  DropNAndSetTop(1, A0);
+  Dispatch(kInvokeAddLength);

[erikcorry, 2016/06/27 15:51:08]

kInvokeSubLength

[petarj, 2016/06/29 02:09:15]

Done.

 }
 
 void InterpreterGeneratorMIPS::InvokeMod(const char* fallback) {
 }
 
 void InterpreterGeneratorMIPS::InvokeMul(const char* fallback) {
+  LoadLocal(A0, 1);
+  __ andi(T0, A0, Immediate(Smi::kTagMask));
+  __ B(NEQ, T0, ZR, fallback);
+  LoadLocal(A1, 0);
+  __ andi(T1, A1, Immediate(Smi::kTagMask));
+  __ B(NEQ, T1, ZR, fallback);
+
+  __ sra(A0, A0, Immediate(1));
+  __ mult(A0, A1);
+  __ mfhi(T1);
+  __ mflo(T0);
+  __ move(A0, T0);
+  __ sra(T0, T0, Immediate(31));
+  __ B(NEQ, T1, T0, fallback);
+
+  DropNAndSetTop(1, A0);
+  Dispatch(kInvokeMulLength);
 }
 
 void InterpreterGeneratorMIPS::InvokeTruncDiv(const char* fallback) {
 }
 
 void InterpreterGeneratorMIPS::InvokeBitNot(const char* fallback) {
 }
 
 void InterpreterGeneratorMIPS::InvokeBitAnd(const char* fallback) {
+  LoadLocal(A0, 1);
+  __ andi(T0, A0, Immediate(Smi::kTagMask));
+  __ B(NEQ, T0, ZR, fallback);
+  LoadLocal(A1, 0);
+  __ andi(T0, A1, Immediate(Smi::kTagMask));
+  __ B(NEQ, T0, ZR, fallback);
+
+  __ and_(A0, A0, A1);
+  DropNAndSetTop(1, A0);
+  Dispatch(kInvokeBitAndLength);
 }
 
 void InterpreterGeneratorMIPS::InvokeBitOr(const char* fallback) {
 }
 
 void InterpreterGeneratorMIPS::InvokeBitXor(const char* fallback) {
 }
 
 void InterpreterGeneratorMIPS::InvokeBitShr(const char* fallback) {
+  LoadLocal(A0, 1);
+  __ andi(T0, A0, Immediate(Smi::kTagMask));
+  __ B(NEQ, T0, ZR, fallback);
+  LoadLocal(A1, 0);
+  __ andi(T0, A1, Immediate(Smi::kTagMask));
+  __ B(NEQ, T0, ZR, fallback);
+
+  // Untag and shift.
+  __ sra(A0, A0, Immediate(1));
+  __ sra(A1, A1, Immediate(1));
+
+  Label shift;
+  __ li(T0, Immediate(32));
+  __ B(LT, A1, T0, &shift);
+  __ li(A1, Immediate(31));
+  __ Bind(&shift);
+  __ srav(A0, A0, A1);
+
+  // Retag and store.
+  __ addu(A0, A0, A0);
+  DropNAndSetTop(1, A0);
+  Dispatch(kInvokeBitAndLength);
 }
 
 void InterpreterGeneratorMIPS::InvokeBitShl(const char* fallback) {
+  LoadLocal(A0, 1);
+  __ andi(T0, A0, Immediate(Smi::kTagMask));
+  __ B(NEQ, T0, ZR, fallback);
+  LoadLocal(A1, 0);
+  __ andi(T0, A1, Immediate(Smi::kTagSize));
+  __ B(NEQ, T0, ZR, fallback);
+
+  // Untag the shift count, but not the value. If the shift
+  // count is greater than 31 (or negative), the shift is going
+  // to misbehave so we have to guard against that.
+  __ sra(A1, A1, Immediate(1));
+  __ li(T0, Immediate(31));

[erikcorry, 2016/06/27 15:51:08]

Perhaps save one instruction with

sra(T0, A1, Immediate(5));
bne(T0, ZR, fallback);

[petarj, 2016/06/29 02:09:15]

Done, thanks for the idea.

+  __ sltu(T1, T0, A1);
+  __ B(GT, T1, ZR, fallback);
+
+  // Only allow to shift out "sign bits". If we shift
+  // out any other bit, it's an overflow.
+  __ sllv(A2, A0, A1);
+  __ srav(A3, A2, A1);
+  __ B(NEQ, A3, A0, fallback);
+
+  DropNAndSetTop(1, A2);
+  Dispatch(kInvokeBitShlLength);
 }
 
 void InterpreterGeneratorMIPS::DoPop() {
   Drop(1);
   Dispatch(kPopLength);
 }
 
 void InterpreterGeneratorMIPS::DoDrop() {
+  __ lbu(A0, Address(S1, 1));
+  Drop(A0);
+  Dispatch(kDropLength);
 }
 
 void InterpreterGeneratorMIPS::DoReturn() {
   Return(false);
 }
 
 void InterpreterGeneratorMIPS::DoReturnNull() {
   Return(true);
 }
 
 void InterpreterGeneratorMIPS::DoBranchWide() {
   __ lw(A0, Address(S1, 1));
   __ addu(S1, S1, A0);
   Dispatch(0);
 }
 
 void InterpreterGeneratorMIPS::DoBranchIfTrueWide() {
   Label branch;
   Pop(S3);
-  __ B(EQ, S3, S6, &branch);
+  LoadTrue(A2);
+  __ B(EQ, S3, A2, &branch);
   Dispatch(kBranchIfTrueWideLength);
 
   __ Bind(&branch);
   __ lw(A0, Address(S1, 1));
   __ addu(S1, S1, A0);
   Dispatch(0);
 }
 
 void InterpreterGeneratorMIPS::DoBranchIfFalseWide() {
   Label branch;
   Pop(S3);
-  __ B(NEQ, S3, S6, &branch);
+  LoadTrue(A2);
+  __ B(NEQ, S3, A2, &branch);
   Dispatch(kBranchIfFalseWideLength);
 
   __ Bind(&branch);
   __ lw(A0, Address(S1, 1));
   __ addu(S1, S1, A0);
   Dispatch(0);
 }
 
 void InterpreterGeneratorMIPS::DoBranchBack() {
+  CheckStackOverflow(0);
+  __ lbu(A0, Address(S1, 1));
+  __ subu(S1, S1, A0);
+  Dispatch(0);
 }
 
 void InterpreterGeneratorMIPS::DoBranchBackIfTrue() {
 }
 
 void InterpreterGeneratorMIPS::DoBranchBackIfFalse() {
 }
 
 void InterpreterGeneratorMIPS::DoBranchBackWide() {
 }
 
 void InterpreterGeneratorMIPS::DoBranchBackIfTrueWide() {
 }
 
 void InterpreterGeneratorMIPS::DoBranchBackIfFalseWide() {
 }
 
 void InterpreterGeneratorMIPS::DoPopAndBranchWide() {
+  __ lbu(A0, Address(S1, 1));
+  ShiftAdd(S2, S2, A0, TIMES_WORD_SIZE);
+
+  __ lw(A0, Address(S1, 2));
+  __ addu(S1, S1, A0);
+  Dispatch(0);
 }
 
 void InterpreterGeneratorMIPS::DoPopAndBranchBackWide() {
 }
 
 void InterpreterGeneratorMIPS::DoAllocate() {
   Allocate(false);
 }
 
 void InterpreterGeneratorMIPS::DoAllocateImmutable() {
+  Allocate(true);
 }
 
 void InterpreterGeneratorMIPS::DoAllocateBoxed() {
+  LoadLocal(A1, 0);
+  PrepareStack();
+  __ la(T9, "HandleAllocateBoxed");
+  __ jalr(T9);
+  __ move(A0, S0);  // Delay-slot.
+  RestoreStack();
+  __ move(A0, V0);
+  __ andi(A1, A0, Immediate(Failure::kTagMask | Failure::kTypeMask));
+  __ li(T0, Immediate(Failure::kTag));
+  __ B(EQ, A1, T0, &gc_);
+  StoreLocal(A0, 0);
+  Dispatch(kAllocateBoxedLength);
 }
 
 void InterpreterGeneratorMIPS::DoNegate() {
 }
 
 void InterpreterGeneratorMIPS::DoStackOverflowCheck() {
 }
 
 void InterpreterGeneratorMIPS::DoThrowAfterSaveState(Label* resume) {
   // Use the stack to store the stack delta initialized to zero, and the
@@ skipping 29 matching lines @@
   ShiftAdd(S2, S2, A3, TIMES_WORD_SIZE);
 
   StoreLocal(S3, 0);
   Dispatch(0);
 }
 
 void InterpreterGeneratorMIPS::DoThrow() {
 }
 
 void InterpreterGeneratorMIPS::DoSubroutineCall() {
+  __ lw(A0, Address(S1, 1));
+  __ lw(A1, Address(S1, 5));
+
+  // Push the return delta as a tagged smi.
+  ASSERT(Smi::kTag == 0);
+  __ sll(A1, A1, Immediate(Smi::kTagSize));
+  Push(A1);
+
+  __ addu(S1, S1, A0);
+  Dispatch(0);
 }
 
 void InterpreterGeneratorMIPS::DoSubroutineReturn() {
+  Pop(A0);
+  __ srl(A0, A0, Immediate(Smi::kTagSize));
+  __ subu(S1, S1, A0);
+  Dispatch(0);
 }
 
 void InterpreterGeneratorMIPS::DoProcessYield() {
   LoadLocal(A0, 0);
   __ sra(V0, A0, Immediate(1));
   __ addiu(S1, S1, Immediate(kProcessYieldLength));
   StoreLocal(S4, 0);
   __ B(&done_);
 }
 
@@ skipping 18 matching lines @@
   DropNAndSetTop(1, S3);
   Dispatch(kCoroutineChangeLength);
 }
 
 void InterpreterGeneratorMIPS::DoIdentical() {
 }
 
 void InterpreterGeneratorMIPS::DoIdenticalNonNumeric() {
   LoadLocal(A0, 0);
   LoadLocal(A1, 1);
-  __ subu(T0, A0, A1);
-  ConditionalStore(T0, S6, S7, Address(S2, kWordSize));
+  ToBoolean(A0, A1, EQ, A2);
+  StoreLocal(A2, 1);
+
   Drop(1);
   Dispatch(kIdenticalNonNumericLength);
 }
 
 void InterpreterGeneratorMIPS::DoEnterNoSuchMethod() {
 }
 
 void InterpreterGeneratorMIPS::DoExitNoSuchMethod() {
 }
 
 void InterpreterGeneratorMIPS::DoMethodEnd() {
 }
 
 void InterpreterGeneratorMIPS::DoIntrinsicObjectEquals() {
 }
 
 void InterpreterGeneratorMIPS::DoIntrinsicGetField() {
   __ lbu(A1, Address(A0, 2 + Function::kSize - HeapObject::kTag));
   LoadLocal(A0, 0);
   __ addiu(A0, A0, Immediate(Instance::kSize - HeapObject::kTag));
   ShiftAddLoad(A0, A0, A1, TIMES_WORD_SIZE);
 
   __ Jr(RA);
 }
 
 void InterpreterGeneratorMIPS::DoIntrinsicSetField() {
+  __ lbu(A1, Address(A0, 3 + Function::kSize - HeapObject::kTag));
+  LoadLocal(S3, 0);
+  LoadLocal(A2, 1);
+  __ addiu(A3, A2, Immediate(Instance::kSize - HeapObject::kTag));
+  ShiftAddStore(S3, A3, A1, TIMES_WORD_SIZE);
+
+  // S3 is not trashed.
+  AddToRememberedSet(A2, S3, A3);
+
+  __ move(T9, RA);
+  __ jr(T9);
+  __ move(A0, S3);  // Delay-slot.
 }
 
 void InterpreterGeneratorMIPS::DoIntrinsicListIndexGet() {
 }
 
 void InterpreterGeneratorMIPS::DoIntrinsicListIndexSet() {
 }
 
 void InterpreterGeneratorMIPS::DoIntrinsicListLength() {
 }
@@ skipping 72 matching lines @@
 void InterpreterGeneratorMIPS::ReadFrameDescriptor(Register scratch) {
 }
 
 void InterpreterGeneratorMIPS::InvokeMethodUnfold(bool test) {
 }
 
 void InterpreterGeneratorMIPS::InvokeMethod(bool test) {
   // Get the selector from the bytecodes.
   __ lw(S3, Address(S1, 1));
 
   // Fetch the virtual table from the program.

[erikcorry, 2016/06/27 15:51:08]

Comment is out of date.

[petarj, 2016/06/29 02:09:15]

Removed.

-  __ lw(A1, Address(S0, Process::kProgramOffset));
-  __ lw(A1, Address(A1, Program::kDispatchTableOffset));
+  __ lw(A1, Address(S6, Program::kDispatchTableOffset));
 
   if (!test) {
     // Compute the arity from the selector.
     ASSERT(Selector::ArityField::shift() == 0);
     __ andi(A2, S3, Immediate(Selector::ArityField::mask()));
   }
 
   // Compute the selector offset (smi tagged) from the selector.
   __ li(S5, Immediate(Selector::IdField::mask()));
   __ and_(S3, S3, S5);
   __ srl(S3, S3, Immediate(Selector::IdField::shift() - Smi::kTagSize));
 
   // Get the receiver from the stack.
   if (test) {
     LoadLocal(A2, 0);
   } else {
     ShiftAddLoad(A2, S2, A2, TIMES_WORD_SIZE);
   }
+
   // Compute the receiver class.
   Label smi, dispatch;
   ASSERT(Smi::kTag == 0);
   __ andi(T0, A2, Immediate(Smi::kTagMask));
   __ B(EQ, T0, ZR, &smi);
   __ lw(A2, Address(A2, HeapObject::kClassOffset - HeapObject::kTag));
 
   // Compute entry index: class id + selector offset.
   int id_offset = Class::kIdOrTransformationTargetOffset - HeapObject::kTag;
   __ Bind(&dispatch);
   __ lw(A2, Address(A2, id_offset));
   __ addu(A2, A2, S3);
 
   // Fetch the entry from the table. Because the index is smi tagged
   // we only multiply by two -- not four -- when indexing.
   ASSERT(Smi::kTagSize == 1);
   __ addiu(A1, A1, Immediate(Array::kSize - HeapObject::kTag));
   ShiftAddLoad(A1, A1, A2, TIMES_2);
 
   // Validate that the offset stored in the entry matches the offset
   // we used to find it.
   Label invalid;
   __ lw(A3, Address(A1, DispatchTableEntry::kOffsetOffset - HeapObject::kTag));
   __ B(NEQ, S3, A3, &invalid);
 
   // Load the target and the intrinsic from the entry.
   Label validated, intrinsified;
   if (test) {
     // Valid entry: The answer is true.
-    StoreLocal(S6, 0);
+    LoadTrue(A2);
+    StoreLocal(A2, 0);
     Dispatch(kInvokeTestLength);
   } else {
     __ Bind(&validated);
 
     __ lw(A0, Address(A1,
                       DispatchTableEntry::kTargetOffset - HeapObject::kTag));
 
     SaveByteCodePointer(A2);
     __ lw(A1, Address(A1, DispatchTableEntry::kCodeOffset - HeapObject::kTag));
     __ move(T9, A1);
     __ Jalr(T9);
     RestoreByteCodePointer(A2);
 
     __ lw(S3, Address(S1, 1));
     // Compute the arity from the selector.
     ASSERT(Selector::ArityField::shift() == 0);
     __ andi(A2, S3, Immediate(Selector::ArityField::mask()));
 
     Drop(A2);
 
     StoreLocal(A0, 0);
     Dispatch(kInvokeMethodLength);
   }
 
   __ Bind(&smi);
-  __ lw(A2, Address(S0, Process::kProgramOffset));
   __ b(&dispatch);
-  __ lw(A2, Address(A2, Program::kSmiClassOffset));  // Delay-slot.
+  __ lw(A2, Address(S6, Program::kSmiClassOffset));  // Delay-slot.
 
   if (test) {
     // Invalid entry: The answer is false.
     __ Bind(&invalid);
-    StoreLocal(S7, 0);
+    LoadFalse(A2);
+    StoreLocal(A2, 0);
     Dispatch(kInvokeTestLength);
   } else {
     __ Bind(&intrinsified);
     __ move(T9, A2);
     __ Jr(T9);
 
     // Invalid entry: Use the noSuchMethod entry from entry zero of
     // the virtual table.
     __ Bind(&invalid);
-    __ lw(A1, Address(S0, Process::kProgramOffset));
-    __ lw(A1, Address(A1, Program::kDispatchTableOffset));
+    __ lw(A1, Address(S6, Program::kDispatchTableOffset));
     __ b(&validated);
     __ lw(A1, Address(A1, Array::kSize - HeapObject::kTag));  // Delay-slot.
   }
 }
 
 void InterpreterGeneratorMIPS::InvokeNative(bool yield, bool safepoint) {
   __ lbu(A1, Address(S1, 1));
   // Also skip two empty slots.
   __ addiu(A1, A1, Immediate(2));
   __ lbu(A0, Address(S1, 2));
@@ skipping 228 matching lines @@
 
 void InterpreterGeneratorMIPS::InvokeCompare(const char* fallback,
                                              Condition cond) {
   LoadLocal(A0, 0);
   __ andi(T0, A0, Immediate(Smi::kTagMask));
   __ B(NEQ, T0, ZR, fallback);
   LoadLocal(A1, 1);
   __ andi(T0, A1, Immediate(Smi::kTagMask));
   __ B(NEQ, T0, ZR, fallback);
 
-  Label true_case;
-  __ B(cond, A1, A0, &true_case);
-
-  DropNAndSetTop(1, S7);
+  ToBoolean(A1, A0, cond, A2);
+  DropNAndSetTop(1, A2);
   Dispatch(5);
 
-  __ Bind(&true_case);
   DropNAndSetTop(1, S6);
   Dispatch(5);
 }
 
-void InterpreterGeneratorMIPS::ConditionalStore(Register cmp,
-                                                Register reg_if_eq,
-                                                Register reg_if_ne,
-                                                const Address& address) {
-  Label if_ne, done;
-  __ B(NEQ, cmp, ZR, &if_ne);
-  __ b(&done);
-  __ sw(reg_if_eq, address);  // Delay-slot.
-  __ Bind(&if_ne);
-  __ sw(reg_if_ne, address);
+void InterpreterGeneratorMIPS::AddIf(Register reg1, Register reg2,
+                                     Condition cond, Register dest,
+                                     int add_if_eq) {
+  Label done, add;
+  __ B(cond, reg1, reg2, &add);

[erikcorry, 2016/06/27 15:51:08]

Optimization idea for a later CL: If the condition is LT or GT and the add_if_eq
is a power of 2, then this can be done with SLT and shift with no branches.

If the condition is EQ then you can do it with two SLTs and an OR.

[petarj, 2016/06/29 02:09:15]

Thanks, will use in one of the later CLs.

+  __ B(&done);
+  __ Bind(&add);
+  __ addiu(dest, dest, Immediate(add_if_eq));
   __ Bind(&done);
 }
 
+void InterpreterGeneratorMIPS::LoadTrue(Register reg) {
+  __ addiu(reg, S4, Immediate(kTrueOffset));
+}
+
+void InterpreterGeneratorMIPS::LoadFalse(Register reg) {
+  __ addiu(reg, S4, Immediate(kFalseOffset));
+}
+
+void InterpreterGeneratorMIPS::ToBoolean(Register reg1,
+                                         Register reg2,
+                                         Condition cond,
+                                         Register reg) {
+  LoadFalse(reg);
+  AddIf(reg1, reg2, cond, reg, kTrueOffset - kFalseOffset);
+}
+
 void InterpreterGeneratorMIPS::CheckStackOverflow(int size) {
   __ lw(A1, Address(S0, Process::kStackLimitOffset));
   __ sltu(T0, A1, S2);
   if (size == 0) {
     __ B(EQ, T0, ZR, &check_stack_overflow_0_);
   } else {
     Label done;
     __ B(GT, T0, ZR, &done);
     __ b(&check_stack_overflow_);
     __ ori(A0, ZR, Immediate(size));  // Delay-slot.
     __ Bind(&done);
   }
 }
 
 void InterpreterGeneratorMIPS::Dispatch(int size) {
   __ lbu(S3, Address(S1, size));
   if (size > 0) {
     __ addiu(S1, S1, Immediate(size));
   }
-  __ la(S5, "Interpret_DispatchTable");
-  ShiftAddJump(S5, S3, TIMES_WORD_SIZE);
+  ShiftAddJump(S7, S3, TIMES_WORD_SIZE);
 }
 
 void InterpreterGeneratorMIPS::SaveState(Label* resume) {
   // Save the bytecode pointer at the return-address slot.
   LoadFramePointer(A3);
   __ sw(S1, Address(A3, -kWordSize));
 
   // Push resume address.
   __ la(S1, resume);
 
@@ skipping 14 matching lines @@
 void InterpreterGeneratorMIPS::RestoreState() {
   // Load the current stack pointer into S2.
   __ lw(S2, Address(S0, Process::kCoroutineOffset));
   __ lw(S2, Address(S2, Coroutine::kStackOffset - HeapObject::kTag));
   __ lw(S1, Address(S2, Stack::kTopOffset - HeapObject::kTag));
   __ addiu(S2, S2, Immediate(Stack::kSize - HeapObject::kTag));
   ShiftAdd(S2, S2, S1, TIMES_2);
 
   // Load constants into registers.
   __ lw(S6, Address(S0, Process::kProgramOffset));
-  __ lw(S7, Address(S6, Program::kFalseObjectOffset));
   __ lw(S4, Address(S6, Program::kNullObjectOffset));
-  __ lw(S6, Address(S6, Program::kTrueObjectOffset));
+  __ la(S7, "Interpret_DispatchTable");
 
   // Pop and store frame pointer.
   Pop(S1);
   StoreFramePointer(S1);
   // Set the bytecode pointer from the stack.
   __ lw(S1, Address(S1, -kWordSize));
 
   // Pop and branch to resume address.
   Pop(RA);
 
@@ skipping 83 matching lines @@
   __ addiu(SP, SP, Immediate(-6 * kWordSize));
   __ sw(GP, Address(SP, 5 * kWordSize));
 }
 
 void InterpreterGeneratorMIPS::RestoreStack() {
   __ lw(GP, Address(SP, 5 * kWordSize));
   __ addiu(SP, SP, Immediate(6 * kWordSize));
 }
 }  // namespace dartino
 #endif  // defined DARTINO_TARGET_MIPS