[Turbofan] Add the concept of aliasing to RegisterConfiguration.

test/cctest/compiler/test-run-native-calls.cc

 // Copyright 2015 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/assembler.h"
 #include "src/codegen.h"
 #include "src/compiler/linkage.h"
 #include "src/compiler/raw-machine-assembler.h"
 #include "src/machine-type.h"
 #include "src/register-configuration.h"
@@ skipping 73 matching lines @@
                 ->allocatable_general_codes()) {}
 };
 
 
 // Pairs of double registers.
 class Float32RegisterPairs : public Pairs {
  public:
   Float32RegisterPairs()
       : Pairs(
             100,
+#if V8_TARGET_ARCH_ARM
+            // TODO(bbudge) Modify wasm linkage to allow use of all float regs.
             RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
-                ->num_allocatable_aliased_double_registers(),
+                        ->num_allocatable_double_registers() /
+                    2 -
+                2,
+#else
             RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
-                ->allocatable_double_codes()) {}
+                ->num_allocatable_double_registers(),
+#endif
+            RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
+                ->allocatable_double_codes()) {
+  }
 };
 
 
 // Pairs of double registers.
 class Float64RegisterPairs : public Pairs {
  public:
   Float64RegisterPairs()
       : Pairs(
             100,
             RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
-                ->num_allocatable_aliased_double_registers(),
+                ->num_allocatable_double_registers(),
             RegisterConfiguration::ArchDefault(RegisterConfiguration::TURBOFAN)
                 ->allocatable_double_codes()) {}
 };
 
 
 // Helper for allocating either an GP or FP reg, or the next stack slot.
 struct Allocator {
   Allocator(int* gp, int gpc, int* fp, int fpc)
       : gp_count(gpc),
         gp_offset(0),
@@ skipping 10 matching lines @@
   int fp_count;
   int fp_offset;
   int* fp_regs;
 
   int stack_offset;
 
   LinkageLocation Next(MachineType type) {
     if (IsFloatingPoint(type.representation())) {
       // Allocate a floating point register/stack location.
       if (fp_offset < fp_count) {
-        return LinkageLocation::ForRegister(fp_regs[fp_offset++]);
+        int code = fp_regs[fp_offset++];
+#if V8_TARGET_ARCH_ARM
+        // TODO(bbudge) Modify wasm linkage to allow use of all float regs.
+        if (type.representation() == MachineRepresentation::kFloat32) code *= 2;
+#endif
+        return LinkageLocation::ForRegister(code);
       } else {
         int offset = -1 - stack_offset;
         stack_offset += StackWords(type);
         return LinkageLocation::ForCallerFrameSlot(offset);
       }
     } else {
       // Allocate a general purpose register/stack location.
       if (gp_offset < gp_count) {
         return LinkageLocation::ForRegister(gp_regs[gp_offset++]);
       } else {
@@ skipping 1105 matching lines @@
   TestStackSlot(MachineType::Float32(), magic);
 }
 
 TEST(RunStackSlotFloat64) {
   double magic = 3456.375;
   TestStackSlot(MachineType::Float64(), magic);
 }
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8