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Side by Side Diff: src/register-configuration.cc

Issue 2086653003: [Turbofan] Add the concept of aliasing to RegisterConfiguration. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Rebase. Created 4 years, 6 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/register-configuration.h" 5 #include "src/register-configuration.h"
6 #include "src/globals.h" 6 #include "src/globals.h"
7 #include "src/macro-assembler.h" 7 #include "src/macro-assembler.h"
8 8
9 namespace v8 { 9 namespace v8 {
10 namespace internal { 10 namespace internal {
(...skipping 39 matching lines...) Expand 10 before | Expand all | Expand 10 after
50 STATIC_ASSERT(RegisterConfiguration::kMaxFPRegisters >= 50 STATIC_ASSERT(RegisterConfiguration::kMaxFPRegisters >=
51 DoubleRegister::kMaxNumRegisters); 51 DoubleRegister::kMaxNumRegisters);
52 52
53 class ArchDefaultRegisterConfiguration : public RegisterConfiguration { 53 class ArchDefaultRegisterConfiguration : public RegisterConfiguration {
54 public: 54 public:
55 explicit ArchDefaultRegisterConfiguration(CompilerSelector compiler) 55 explicit ArchDefaultRegisterConfiguration(CompilerSelector compiler)
56 : RegisterConfiguration( 56 : RegisterConfiguration(
57 Register::kNumRegisters, DoubleRegister::kMaxNumRegisters, 57 Register::kNumRegisters, DoubleRegister::kMaxNumRegisters,
58 #if V8_TARGET_ARCH_IA32 58 #if V8_TARGET_ARCH_IA32
59 kMaxAllocatableGeneralRegisterCount, 59 kMaxAllocatableGeneralRegisterCount,
60 kMaxAllocatableDoubleRegisterCount, 60 kMaxAllocatableDoubleRegisterCount, AliasingKind::OVERLAP,
61 kMaxAllocatableDoubleRegisterCount,
62 #elif V8_TARGET_ARCH_X87 61 #elif V8_TARGET_ARCH_X87
63 kMaxAllocatableGeneralRegisterCount, 62 kMaxAllocatableGeneralRegisterCount,
64 compiler == TURBOFAN ? 1 : kMaxAllocatableDoubleRegisterCount, 63 compiler == TURBOFAN ? 1 : kMaxAllocatableDoubleRegisterCount,
65 compiler == TURBOFAN ? 1 : kMaxAllocatableDoubleRegisterCount, 64 AliasingKind::OVERLAP,
66 #elif V8_TARGET_ARCH_X64 65 #elif V8_TARGET_ARCH_X64
67 kMaxAllocatableGeneralRegisterCount, 66 kMaxAllocatableGeneralRegisterCount,
68 kMaxAllocatableDoubleRegisterCount, 67 kMaxAllocatableDoubleRegisterCount, AliasingKind::OVERLAP,
69 kMaxAllocatableDoubleRegisterCount,
70 #elif V8_TARGET_ARCH_ARM 68 #elif V8_TARGET_ARCH_ARM
71 FLAG_enable_embedded_constant_pool 69 FLAG_enable_embedded_constant_pool
72 ? (kMaxAllocatableGeneralRegisterCount - 1) 70 ? (kMaxAllocatableGeneralRegisterCount - 1)
73 : kMaxAllocatableGeneralRegisterCount, 71 : kMaxAllocatableGeneralRegisterCount,
74 CpuFeatures::IsSupported(VFP32DREGS) 72 CpuFeatures::IsSupported(VFP32DREGS)
75 ? kMaxAllocatableDoubleRegisterCount 73 ? kMaxAllocatableDoubleRegisterCount
76 : (ALLOCATABLE_NO_VFP32_DOUBLE_REGISTERS(REGISTER_COUNT) 0), 74 : (ALLOCATABLE_NO_VFP32_DOUBLE_REGISTERS(REGISTER_COUNT) 0),
77 ALLOCATABLE_NO_VFP32_DOUBLE_REGISTERS(REGISTER_COUNT) 0, 75 AliasingKind::COMBINE,
78 #elif V8_TARGET_ARCH_ARM64 76 #elif V8_TARGET_ARCH_ARM64
79 kMaxAllocatableGeneralRegisterCount, 77 kMaxAllocatableGeneralRegisterCount,
80 kMaxAllocatableDoubleRegisterCount, 78 kMaxAllocatableDoubleRegisterCount, AliasingKind::OVERLAP,
81 kMaxAllocatableDoubleRegisterCount,
82 #elif V8_TARGET_ARCH_MIPS 79 #elif V8_TARGET_ARCH_MIPS
83 kMaxAllocatableGeneralRegisterCount, 80 kMaxAllocatableGeneralRegisterCount,
84 kMaxAllocatableDoubleRegisterCount, 81 kMaxAllocatableDoubleRegisterCount, AliasingKind::OVERLAP,
85 kMaxAllocatableDoubleRegisterCount,
86 #elif V8_TARGET_ARCH_MIPS64 82 #elif V8_TARGET_ARCH_MIPS64
87 kMaxAllocatableGeneralRegisterCount, 83 kMaxAllocatableGeneralRegisterCount,
88 kMaxAllocatableDoubleRegisterCount, 84 kMaxAllocatableDoubleRegisterCount, AliasingKind::OVERLAP,
89 kMaxAllocatableDoubleRegisterCount,
90 #elif V8_TARGET_ARCH_PPC 85 #elif V8_TARGET_ARCH_PPC
91 kMaxAllocatableGeneralRegisterCount, 86 kMaxAllocatableGeneralRegisterCount,
92 kMaxAllocatableDoubleRegisterCount, 87 kMaxAllocatableDoubleRegisterCount, AliasingKind::OVERLAP,
93 kMaxAllocatableDoubleRegisterCount,
94 #elif V8_TARGET_ARCH_S390 88 #elif V8_TARGET_ARCH_S390
95 kMaxAllocatableGeneralRegisterCount, 89 kMaxAllocatableGeneralRegisterCount,
96 kMaxAllocatableDoubleRegisterCount, 90 kMaxAllocatableDoubleRegisterCount, AliasingKind::OVERLAP,
97 kMaxAllocatableDoubleRegisterCount,
98 #else 91 #else
99 #error Unsupported target architecture. 92 #error Unsupported target architecture.
100 #endif 93 #endif
101 kAllocatableGeneralCodes, kAllocatableDoubleCodes, 94 kAllocatableGeneralCodes, kAllocatableDoubleCodes,
102 kGeneralRegisterNames, kFloatRegisterNames, kDoubleRegisterNames) { 95 kGeneralRegisterNames, kFloatRegisterNames, kDoubleRegisterNames) {
103 } 96 }
104 }; 97 };
105 98
106 99
107 template <RegisterConfiguration::CompilerSelector compiler> 100 template <RegisterConfiguration::CompilerSelector compiler>
(...skipping 20 matching lines...) Expand all
128 const RegisterConfiguration* RegisterConfiguration::ArchDefault( 121 const RegisterConfiguration* RegisterConfiguration::ArchDefault(
129 CompilerSelector compiler) { 122 CompilerSelector compiler) {
130 return compiler == TURBOFAN 123 return compiler == TURBOFAN
131 ? &kDefaultRegisterConfigurationForTurboFan.Get() 124 ? &kDefaultRegisterConfigurationForTurboFan.Get()
132 : &kDefaultRegisterConfigurationForCrankshaft.Get(); 125 : &kDefaultRegisterConfigurationForCrankshaft.Get();
133 } 126 }
134 127
135 RegisterConfiguration::RegisterConfiguration( 128 RegisterConfiguration::RegisterConfiguration(
136 int num_general_registers, int num_double_registers, 129 int num_general_registers, int num_double_registers,
137 int num_allocatable_general_registers, int num_allocatable_double_registers, 130 int num_allocatable_general_registers, int num_allocatable_double_registers,
138 int num_allocatable_aliased_double_registers, 131 AliasingKind fp_aliasing_kind, const int* allocatable_general_codes,
139 const int* allocatable_general_codes, const int* allocatable_double_codes, 132 const int* allocatable_double_codes,
140 const char* const* general_register_names, 133 const char* const* general_register_names,
141 const char* const* float_register_names, 134 const char* const* float_register_names,
142 const char* const* double_register_names) 135 const char* const* double_register_names)
143 : num_general_registers_(num_general_registers), 136 : num_general_registers_(num_general_registers),
137 num_float_registers_(0),
144 num_double_registers_(num_double_registers), 138 num_double_registers_(num_double_registers),
145 num_allocatable_general_registers_(num_allocatable_general_registers), 139 num_allocatable_general_registers_(num_allocatable_general_registers),
146 num_allocatable_double_registers_(num_allocatable_double_registers), 140 num_allocatable_double_registers_(num_allocatable_double_registers),
147 num_allocatable_aliased_double_registers_( 141 num_allocatable_float_registers_(0),
148 num_allocatable_aliased_double_registers), 142 fp_aliasing_kind_(fp_aliasing_kind),
149 allocatable_general_codes_mask_(0), 143 allocatable_general_codes_mask_(0),
150 allocatable_double_codes_mask_(0), 144 allocatable_double_codes_mask_(0),
151 allocatable_general_codes_(allocatable_general_codes), 145 allocatable_general_codes_(allocatable_general_codes),
152 allocatable_double_codes_(allocatable_double_codes), 146 allocatable_double_codes_(allocatable_double_codes),
153 general_register_names_(general_register_names), 147 general_register_names_(general_register_names),
154 float_register_names_(float_register_names), 148 float_register_names_(float_register_names),
155 double_register_names_(double_register_names) { 149 double_register_names_(double_register_names) {
156 DCHECK(num_general_registers_ <= RegisterConfiguration::kMaxGeneralRegisters); 150 DCHECK(num_general_registers_ <= RegisterConfiguration::kMaxGeneralRegisters);
157 DCHECK(num_double_registers_ <= RegisterConfiguration::kMaxFPRegisters); 151 DCHECK(num_double_registers_ <= RegisterConfiguration::kMaxFPRegisters);
158 for (int i = 0; i < num_allocatable_general_registers_; ++i) { 152 for (int i = 0; i < num_allocatable_general_registers_; ++i) {
159 allocatable_general_codes_mask_ |= (1 << allocatable_general_codes_[i]); 153 allocatable_general_codes_mask_ |= (1 << allocatable_general_codes_[i]);
160 } 154 }
161 for (int i = 0; i < num_allocatable_double_registers_; ++i) { 155 for (int i = 0; i < num_allocatable_double_registers_; ++i) {
162 allocatable_double_codes_mask_ |= (1 << allocatable_double_codes_[i]); 156 allocatable_double_codes_mask_ |= (1 << allocatable_double_codes_[i]);
163 } 157 }
158
159 if (fp_aliasing_kind_ == COMBINE) {
160 num_float_registers_ = num_double_registers_ * 2 <= kMaxFPRegisters
161 ? num_double_registers_ * 2
162 : kMaxFPRegisters;
163 num_allocatable_float_registers_ = 0;
164 for (int i = 0; i < num_allocatable_double_registers_; i++) {
165 int base_code = allocatable_double_codes_[i] * 2;
166 if (base_code >= kMaxFPRegisters) continue;
167 allocatable_float_codes_[num_allocatable_float_registers_++] = base_code;
168 allocatable_float_codes_[num_allocatable_float_registers_++] =
169 base_code + 1;
170 }
171 } else {
172 DCHECK(fp_aliasing_kind_ == OVERLAP);
173 num_float_registers_ = num_double_registers_;
174 num_allocatable_float_registers_ = num_allocatable_double_registers_;
175 for (int i = 0; i < num_allocatable_float_registers_; ++i) {
176 allocatable_float_codes_[i] = allocatable_double_codes_[i];
177 }
178 }
179 }
180
181 int RegisterConfiguration::GetAliases(MachineRepresentation rep, int index,
182 MachineRepresentation other_rep,
183 int* alias_base_index) const {
184 DCHECK(fp_aliasing_kind_ == COMBINE);
185 DCHECK(rep == MachineRepresentation::kFloat32 ||
186 rep == MachineRepresentation::kFloat64);
187 DCHECK(other_rep == MachineRepresentation::kFloat32 ||
188 other_rep == MachineRepresentation::kFloat64);
189 if (rep == other_rep) {
190 *alias_base_index = index;
191 return 1;
192 }
193 if (rep == MachineRepresentation::kFloat32) {
194 DCHECK(other_rep == MachineRepresentation::kFloat64);
195 DCHECK(index < num_allocatable_float_registers_);
196 *alias_base_index = index / 2;
197 return 1;
198 }
199 DCHECK(rep == MachineRepresentation::kFloat64);
200 DCHECK(other_rep == MachineRepresentation::kFloat32);
201 if (index * 2 >= kMaxFPRegisters) {
202 // Alias indices are out of float register range.
203 return 0;
204 }
205 *alias_base_index = index * 2;
206 return 2;
207 }
208
209 bool RegisterConfiguration::AreAliases(MachineRepresentation rep, int index,
210 MachineRepresentation other_rep,
211 int other_index) const {
212 DCHECK(fp_aliasing_kind_ == COMBINE);
213 DCHECK(rep == MachineRepresentation::kFloat32 ||
214 rep == MachineRepresentation::kFloat64);
215 DCHECK(other_rep == MachineRepresentation::kFloat32 ||
216 other_rep == MachineRepresentation::kFloat64);
217 if (rep == other_rep) {
218 return index == other_index;
219 }
220 if (rep == MachineRepresentation::kFloat32) {
221 DCHECK(other_rep == MachineRepresentation::kFloat64);
222 return index / 2 == other_index;
223 }
224 DCHECK(rep == MachineRepresentation::kFloat64);
225 DCHECK(other_rep == MachineRepresentation::kFloat32);
226 if (index * 2 >= kMaxFPRegisters) {
227 // Alias indices are out of float register range.
228 return false;
229 }
230 return index == other_index / 2;
164 } 231 }
165 232
166 #undef REGISTER_COUNT 233 #undef REGISTER_COUNT
167 234
168 } // namespace internal 235 } // namespace internal
169 } // namespace v8 236 } // namespace v8
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