Chromium Code Reviews| OLD | NEW |
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| 1 // | 1 // |
| 2 // The Subzero Code Generator | 2 // The Subzero Code Generator |
| 3 // | 3 // |
| 4 // This file is distributed under the University of Illinois Open Source | 4 // This file is distributed under the University of Illinois Open Source |
| 5 // License. See LICENSE.TXT for details. | 5 // License. See LICENSE.TXT for details. |
| 6 // | 6 // |
| 7 //===----------------------------------------------------------------------===// | 7 //===----------------------------------------------------------------------===// |
| 8 /// | 8 /// |
| 9 /// \file | 9 /// \file |
| 10 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost | 10 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost |
| (...skipping 462 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... | |
| 473 Ctx->getConstantInt32(Base->getStackOffset()))); | 473 Ctx->getConstantInt32(Base->getStackOffset()))); |
| 474 } | 474 } |
| 475 | 475 |
| 476 void TargetMIPS32::emitVariable(const Variable *Var) const { | 476 void TargetMIPS32::emitVariable(const Variable *Var) const { |
| 477 if (!BuildDefs::dump()) | 477 if (!BuildDefs::dump()) |
| 478 return; | 478 return; |
| 479 Ostream &Str = Ctx->getStrEmit(); | 479 Ostream &Str = Ctx->getStrEmit(); |
| 480 const Type FrameSPTy = IceType_i32; | 480 const Type FrameSPTy = IceType_i32; |
| 481 if (Var->hasReg()) { | 481 if (Var->hasReg()) { |
| 482 Str << '$' << getRegName(Var->getRegNum(), Var->getType()); | 482 Str << '$' << getRegName(Var->getRegNum(), Var->getType()); |
| 483 return; | |
| 484 } else { | 483 } else { |
| 485 int32_t Offset = Var->getStackOffset(); | 484 int32_t Offset = Var->getStackOffset(); |
| 486 Str << Offset; | 485 Str << Offset; |
|
Jim Stichnoth
2016/06/22 15:53:56
The only issue here that I can think of is if Offs
| |
| 487 Str << "($" << getRegName(getFrameOrStackReg(), FrameSPTy); | 486 Str << "($" << getRegName(getFrameOrStackReg(), FrameSPTy); |
| 488 Str << ")"; | 487 Str << ")"; |
| 489 } | 488 } |
| 490 UnimplementedError(getFlags()); | |
| 491 } | 489 } |
| 492 | 490 |
| 493 TargetMIPS32::CallingConv::CallingConv() | 491 TargetMIPS32::CallingConv::CallingConv() |
| 494 : GPRegsUsed(RegMIPS32::Reg_NUM), | 492 : GPRegsUsed(RegMIPS32::Reg_NUM), |
| 495 GPRArgs(GPRArgInitializer.rbegin(), GPRArgInitializer.rend()), | 493 GPRArgs(GPRArgInitializer.rbegin(), GPRArgInitializer.rend()), |
| 496 I64Args(I64ArgInitializer.rbegin(), I64ArgInitializer.rend()), | 494 I64Args(I64ArgInitializer.rbegin(), I64ArgInitializer.rend()), |
| 497 VFPRegsUsed(RegMIPS32::Reg_NUM), | 495 VFPRegsUsed(RegMIPS32::Reg_NUM), |
| 498 FP32Args(FP32ArgInitializer.rbegin(), FP32ArgInitializer.rend()), | 496 FP32Args(FP32ArgInitializer.rbegin(), FP32ArgInitializer.rend()), |
| 499 FP64Args(FP64ArgInitializer.rbegin(), FP64ArgInitializer.rend()) {} | 497 FP64Args(FP64ArgInitializer.rbegin(), FP64ArgInitializer.rend()) {} |
| 500 | 498 |
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| 2116 emitGlobal(*Var, SectionSuffix); | 2114 emitGlobal(*Var, SectionSuffix); |
| 2117 } | 2115 } |
| 2118 } | 2116 } |
| 2119 } break; | 2117 } break; |
| 2120 } | 2118 } |
| 2121 } | 2119 } |
| 2122 | 2120 |
| 2123 void TargetDataMIPS32::lowerConstants() { | 2121 void TargetDataMIPS32::lowerConstants() { |
| 2124 if (getFlags().getDisableTranslation()) | 2122 if (getFlags().getDisableTranslation()) |
| 2125 return; | 2123 return; |
| 2126 UnimplementedError(getFlags()); | |
| 2127 } | 2124 } |
| 2128 | 2125 |
| 2129 void TargetDataMIPS32::lowerJumpTables() { | 2126 void TargetDataMIPS32::lowerJumpTables() { |
| 2130 if (getFlags().getDisableTranslation()) | 2127 if (getFlags().getDisableTranslation()) |
| 2131 return; | 2128 return; |
| 2132 UnimplementedError(getFlags()); | |
| 2133 } | 2129 } |
| 2134 | 2130 |
| 2135 // Helper for legalize() to emit the right code to lower an operand to a | 2131 // Helper for legalize() to emit the right code to lower an operand to a |
| 2136 // register of the appropriate type. | 2132 // register of the appropriate type. |
| 2137 Variable *TargetMIPS32::copyToReg(Operand *Src, RegNumT RegNum) { | 2133 Variable *TargetMIPS32::copyToReg(Operand *Src, RegNumT RegNum) { |
| 2138 Type Ty = Src->getType(); | 2134 Type Ty = Src->getType(); |
| 2139 Variable *Reg = makeReg(Ty, RegNum); | 2135 Variable *Reg = makeReg(Ty, RegNum); |
| 2140 if (isVectorType(Ty)) { | 2136 if (isVectorType(Ty)) { |
| 2141 UnimplementedError(getFlags()); | 2137 UnimplementedError(getFlags()); |
| 2142 } else if (isFloatingType(Ty)) { | 2138 } else if (isFloatingType(Ty)) { |
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| 2289 Str << "\t.set\t" | 2285 Str << "\t.set\t" |
| 2290 << "nomips16\n"; | 2286 << "nomips16\n"; |
| 2291 } | 2287 } |
| 2292 | 2288 |
| 2293 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM]; | 2289 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM]; |
| 2294 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM]; | 2290 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM]; |
| 2295 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM]; | 2291 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM]; |
| 2296 | 2292 |
| 2297 } // end of namespace MIPS32 | 2293 } // end of namespace MIPS32 |
| 2298 } // end of namespace Ice | 2294 } // end of namespace Ice |
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