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1 // | 1 // |
2 // The Subzero Code Generator | 2 // The Subzero Code Generator |
3 // | 3 // |
4 // This file is distributed under the University of Illinois Open Source | 4 // This file is distributed under the University of Illinois Open Source |
5 // License. See LICENSE.TXT for details. | 5 // License. See LICENSE.TXT for details. |
6 // | 6 // |
7 //===----------------------------------------------------------------------===// | 7 //===----------------------------------------------------------------------===// |
8 /// | 8 /// |
9 /// \file | 9 /// \file |
10 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost | 10 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost |
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2235 UnimplementedLoweringError(this, Instr); | 2235 UnimplementedLoweringError(this, Instr); |
2236 return; | 2236 return; |
2237 case Intrinsics::UnknownIntrinsic: | 2237 case Intrinsics::UnknownIntrinsic: |
2238 Func->setError("Should not be lowering UnknownIntrinsic"); | 2238 Func->setError("Should not be lowering UnknownIntrinsic"); |
2239 return; | 2239 return; |
2240 } | 2240 } |
2241 return; | 2241 return; |
2242 } | 2242 } |
2243 | 2243 |
2244 void TargetMIPS32::lowerLoad(const InstLoad *Instr) { | 2244 void TargetMIPS32::lowerLoad(const InstLoad *Instr) { |
2245 UnimplementedLoweringError(this, Instr); | 2245 // A Load instruction can be treated the same as an Assign instruction, after |
| 2246 // the source operand is transformed into an OperandARM32Mem operand. |
| 2247 Type Ty = Instr->getDest()->getType(); |
| 2248 Operand *Src0 = formMemoryOperand(Instr->getSourceAddress(), Ty); |
| 2249 Variable *DestLoad = Instr->getDest(); |
| 2250 DestLoad->setMustHaveReg(); |
| 2251 |
| 2252 // TODO(jvoung): handled folding opportunities. Sign and zero extension can |
| 2253 // be folded into a load. |
| 2254 auto *Assign = InstAssign::create(Func, DestLoad, Src0); |
| 2255 lowerAssign(Assign); |
2246 } | 2256 } |
2247 | 2257 |
2248 void TargetMIPS32::doAddressOptLoad() { UnimplementedError(getFlags()); } | 2258 void TargetMIPS32::doAddressOptLoad() { UnimplementedError(getFlags()); } |
2249 | 2259 |
2250 void TargetMIPS32::randomlyInsertNop(float Probability, | 2260 void TargetMIPS32::randomlyInsertNop(float Probability, |
2251 RandomNumberGenerator &RNG) { | 2261 RandomNumberGenerator &RNG) { |
2252 RandomNumberGeneratorWrapper RNGW(RNG); | 2262 RandomNumberGeneratorWrapper RNGW(RNG); |
2253 if (RNGW.getTrueWithProbability(Probability)) { | 2263 if (RNGW.getTrueWithProbability(Probability)) { |
2254 UnimplementedError(getFlags()); | 2264 UnimplementedError(getFlags()); |
2255 } | 2265 } |
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2574 Str << "\t.set\t" | 2584 Str << "\t.set\t" |
2575 << "nomips16\n"; | 2585 << "nomips16\n"; |
2576 } | 2586 } |
2577 | 2587 |
2578 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM]; | 2588 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM]; |
2579 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM]; | 2589 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM]; |
2580 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM]; | 2590 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM]; |
2581 | 2591 |
2582 } // end of namespace MIPS32 | 2592 } // end of namespace MIPS32 |
2583 } // end of namespace Ice | 2593 } // end of namespace Ice |
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