Subzero, MIPS32: Cross-testing enabled for MIPS32

src/IceTargetLoweringMIPS32.cpp

 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost
@@ skipping 2224 matching lines @@
     UnimplementedLoweringError(this, Instr);
     return;
   case Intrinsics::UnknownIntrinsic:
     Func->setError("Should not be lowering UnknownIntrinsic");
     return;
   }
   return;
 }
 
 void TargetMIPS32::lowerLoad(const InstLoad *Instr) {
-  UnimplementedLoweringError(this, Instr);
+  // A Load instruction can be treated the same as an Assign instruction, after
+  // the source operand is transformed into an OperandARM32Mem operand.
+  Type Ty = Instr->getDest()->getType();
+  Operand *Src0 = formMemoryOperand(Instr->getSourceAddress(), Ty);
+  Variable *DestLoad = Instr->getDest();
+  DestLoad->setMustHaveReg();
+
+  // TODO(jvoung): handled folding opportunities. Sign and zero extension can
+  // be folded into a load.
+  auto *Assign = InstAssign::create(Func, DestLoad, Src0);
+  lowerAssign(Assign);
 }
 
 void TargetMIPS32::doAddressOptLoad() { UnimplementedError(getFlags()); }
 
 void TargetMIPS32::randomlyInsertNop(float Probability,
                                      RandomNumberGenerator &RNG) {
   RandomNumberGeneratorWrapper RNGW(RNG);
   if (RNGW.getTrueWithProbability(Probability)) {
     UnimplementedError(getFlags());
   }
@@ skipping 318 matching lines @@
   Str << "\t.set\t"
       << "nomips16\n";
 }
 
 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM];
 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
 
 } // end of namespace MIPS32
 } // end of namespace Ice