Rename A64 port to ARM64 port

src/arm64/code-stubs-arm64.cc

Index: src/arm64/code-stubs-arm64.cc
diff --git a/src/a64/code-stubs-a64.cc b/src/arm64/code-stubs-arm64.cc
similarity index 99%
rename from src/a64/code-stubs-a64.cc
rename to src/arm64/code-stubs-arm64.cc
index 3fd06157872f968c3012d0376d2e76f5cfd73b7a..f06f6bc6e96e696cd75d740e80ef6f84bcdea698 100644
--- a/src/a64/code-stubs-a64.cc
+++ b/src/arm64/code-stubs-arm64.cc
@@ -27,7 +27,7 @@
 
 #include "v8.h"
 
-#if V8_TARGET_ARCH_A64
+#if V8_TARGET_ARCH_ARM64
 
 #include "bootstrapper.h"
 #include "code-stubs.h"
@@ -1237,7 +1237,7 @@ void MathPowStub::Generate(MacroAssembler* masm) {
       __ Fadd(base_double, base_double, fp_zero);
       // The operation -0+0 results in +0 in all cases except where the
       // FPCR rounding mode is 'round towards minus infinity' (RM). The
-      // A64 simulator does not currently simulate FPCR (where the rounding
+      // ARM64 simulator does not currently simulate FPCR (where the rounding
       // mode is set), so test the operation with some debug code.
       if (masm->emit_debug_code()) {
         UseScratchRegisterScope temps(masm);
@@ -1259,7 +1259,7 @@ void MathPowStub::Generate(MacroAssembler* masm) {
 
       // If base is -INFINITY, make it +INFINITY.
       //  * Calculate base - base: All infinities will become NaNs since both
-      //    -INFINITY+INFINITY and +INFINITY-INFINITY are NaN in A64.
+      //    -INFINITY+INFINITY and +INFINITY-INFINITY are NaN in ARM64.
       //  * If the result is NaN, calculate abs(base).
       __ Fsub(scratch0_double, base_double, base_double);
       __ Fcmp(scratch0_double, 0.0);
@@ -1399,7 +1399,7 @@ void CodeStub::GenerateStubsAheadOfTime(Isolate* isolate) {
 
 
 void CodeStub::GenerateFPStubs(Isolate* isolate) {
-  // Floating-point code doesn't get special handling in A64, so there's
+  // Floating-point code doesn't get special handling in ARM64, so there's
   // nothing to do here.
   USE(isolate);
 }
@@ -4635,7 +4635,7 @@ void BinaryOpICWithAllocationSiteStub::Generate(MacroAssembler* masm) {
 
 
 bool CodeStub::CanUseFPRegisters() {
-  // FP registers always available on A64.
+  // FP registers always available on ARM64.
   return true;
 }
 
@@ -4933,7 +4933,7 @@ void ProfileEntryHookStub::Generate(MacroAssembler* masm) {
   // Compute the function's address as the first argument.
   __ Sub(x0, lr, kReturnAddressDistanceFromFunctionStart);
 
-#if V8_HOST_ARCH_A64
+#if V8_HOST_ARCH_ARM64
   uintptr_t entry_hook =
       reinterpret_cast<uintptr_t>(masm->isolate()->function_entry_hook());
   __ Mov(x10, entry_hook);
@@ -5726,4 +5726,4 @@ void CallApiGetterStub::Generate(MacroAssembler* masm) {
 
 } }  // namespace v8::internal
 
-#endif  // V8_TARGET_ARCH_A64
+#endif  // V8_TARGET_ARCH_ARM64