| Index: src/arm64/instructions-arm64.cc
|
| diff --git a/src/a64/instructions-a64.cc b/src/arm64/instructions-arm64.cc
|
| similarity index 97%
|
| rename from src/a64/instructions-a64.cc
|
| rename to src/arm64/instructions-arm64.cc
|
| index 17f4f2fb199ff1a382392966b21e12ce0809828b..4d1428a1507bbd7b6049e45ec2240ac3ec8e7afe 100644
|
| --- a/src/a64/instructions-a64.cc
|
| +++ b/src/arm64/instructions-arm64.cc
|
| @@ -27,12 +27,12 @@
|
|
|
| #include "v8.h"
|
|
|
| -#if V8_TARGET_ARCH_A64
|
| +#if V8_TARGET_ARCH_ARM64
|
|
|
| -#define A64_DEFINE_FP_STATICS
|
| +#define ARM64_DEFINE_FP_STATICS
|
|
|
| -#include "a64/instructions-a64.h"
|
| -#include "a64/assembler-a64-inl.h"
|
| +#include "arm64/instructions-arm64.h"
|
| +#include "arm64/assembler-arm64-inl.h"
|
|
|
| namespace v8 {
|
| namespace internal {
|
| @@ -306,7 +306,7 @@ void Instruction::SetImmLLiteral(Instruction* source) {
|
|
|
| // TODO(jbramley): We can't put this inline in the class because things like
|
| // xzr and Register are not defined in that header. Consider adding
|
| -// instructions-a64-inl.h to work around this.
|
| +// instructions-arm64-inl.h to work around this.
|
| bool InstructionSequence::IsInlineData() const {
|
| // Inline data is encoded as a single movz instruction which writes to xzr
|
| // (x31).
|
| @@ -318,7 +318,7 @@ bool InstructionSequence::IsInlineData() const {
|
|
|
| // TODO(jbramley): We can't put this inline in the class because things like
|
| // xzr and Register are not defined in that header. Consider adding
|
| -// instructions-a64-inl.h to work around this.
|
| +// instructions-arm64-inl.h to work around this.
|
| uint64_t InstructionSequence::InlineData() const {
|
| ASSERT(IsInlineData());
|
| uint64_t payload = ImmMoveWide();
|
| @@ -330,4 +330,4 @@ uint64_t InstructionSequence::InlineData() const {
|
|
|
| } } // namespace v8::internal
|
|
|
| -#endif // V8_TARGET_ARCH_A64
|
| +#endif // V8_TARGET_ARCH_ARM64
|
|
|