DBC: Adds UnarySmiOp instruction, etc.

runtime/vm/assembler_dbc_test.cc

Index: runtime/vm/assembler_dbc_test.cc
diff --git a/runtime/vm/assembler_dbc_test.cc b/runtime/vm/assembler_dbc_test.cc
index 271ea50bacde056f661aaf45e4c9feb15af1edab..9e4e2cdab4300fe276a5d6504b3ff0b804be6fec 100644
--- a/runtime/vm/assembler_dbc_test.cc
+++ b/runtime/vm/assembler_dbc_test.cc
@@ -794,6 +794,55 @@ ASSEMBLER_TEST_RUN(ShrNegShift, test) {
 }
 
 
+//  - Neg rA , rD
+//
+//    FP[rA] <- -FP[rD]. Assumes FP[rD] is a Smi. If there is no overflow the
+//    immediately following instruction is skipped.
+ASSEMBLER_TEST_GENERATE(NegPos, assembler) {
+  __ Frame(2);
+  __ LoadConstant(0, Smi::Handle(Smi::New(42)));
+  __ LoadConstant(1, Smi::Handle(Smi::New(-1)));
+  __ Neg(1, 0);
+  __ LoadConstant(1, Smi::Handle(Smi::New(-1)));
+  __ Return(1);
+}
+
+
+ASSEMBLER_TEST_RUN(NegPos, test) {
+  EXPECT_EQ(-42, EXECUTE_TEST_CODE_INTPTR(test->code()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(NegNeg, assembler) {
+  __ Frame(2);
+  __ LoadConstant(0, Smi::Handle(Smi::New(-42)));
+  __ LoadConstant(1, Smi::Handle(Smi::New(-1)));
+  __ Neg(1, 0);
+  __ LoadConstant(1, Smi::Handle(Smi::New(-1)));
+  __ Return(1);
+}
+
+
+ASSEMBLER_TEST_RUN(NegNeg, test) {
+  EXPECT_EQ(42, EXECUTE_TEST_CODE_INTPTR(test->code()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(NegOverflow, assembler) {
+  __ Frame(2);
+  __ LoadConstant(0, Smi::Handle(Smi::New(Smi::kMinValue)));
+  __ LoadConstant(1, Smi::Handle(Smi::New(-1)));
+  __ Neg(1, 0);
+  __ LoadConstant(1, Smi::Handle(Smi::New(42)));
+  __ Return(1);
+}
+
+
+ASSEMBLER_TEST_RUN(NegOverflow, test) {
+  EXPECT_EQ(42, EXECUTE_TEST_CODE_INTPTR(test->code()));
+}
+
+
 //  - BitOr, BitAnd, BitXor rA, rB, rC
 //
 //    FP[rA] <- FP[rB] op FP[rC]
@@ -842,6 +891,22 @@ ASSEMBLER_TEST_RUN(BitXor, test) {
 }
 
 
+//  - BitNot rA, rD
+//
+//    FP[rA] <- ~FP[rD]. As above, assumes FP[rD] is a Smi.
+ASSEMBLER_TEST_GENERATE(BitNot, assembler) {
+  __ Frame(2);
+  __ LoadConstant(0, Smi::Handle(Smi::New(~42)));
+  __ LoadConstant(1, Smi::Handle(Smi::New(-1)));
+  __ BitNot(1, 0);
+  __ Return(1);
+}
+
+
+ASSEMBLER_TEST_RUN(BitNot, test) {
+  EXPECT_EQ(42, EXECUTE_TEST_CODE_INTPTR(test->code()));
+}
+
 //  - IfNeStrictTOS; IfEqStrictTOS; IfNeStrictNumTOS; IfEqStrictNumTOS
 //
 //    Skips the next instruction unless the given condition holds. 'Num'
@@ -1524,6 +1589,52 @@ ASSEMBLER_TEST_RUN(CheckSmiFail, test) {
   EXPECT_EQ(42, EXECUTE_TEST_CODE_INTPTR(test->code()));
 }
 
+
+//  - CheckClassId rA, D
+//
+//    If the object at FP[rA]'s class id matches hthe class id in PP[D], then
+//    skip the following instruction.
+ASSEMBLER_TEST_GENERATE(CheckClassIdSmiPass, assembler) {
+  __ Frame(1);
+  __ LoadConstant(0, Smi::Handle(Smi::New(42)));
+  __ CheckClassId(0, __ AddConstant(Smi::Handle(Smi::New(kSmiCid))));
+  __ LoadConstant(0, Smi::Handle(Smi::New(-1)));
+  __ Return(0);
+}
+
+
+ASSEMBLER_TEST_RUN(CheckClassIdSmiPass, test) {
+  EXPECT_EQ(42, EXECUTE_TEST_CODE_INTPTR(test->code()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(CheckClassIdNonSmiPass, assembler) {
+  __ Frame(1);
+  __ LoadConstant(0, Bool::True());
+  __ CheckClassId(0, __ AddConstant(Smi::Handle(Smi::New(kBoolCid))));
+  __ LoadConstant(0, Bool::False());
+  __ Return(0);
+}
+
+
+ASSEMBLER_TEST_RUN(CheckClassIdNonSmiPass, test) {
+  EXPECT(EXECUTE_TEST_CODE_BOOL(test->code()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(CheckClassIdFail, assembler) {
+  __ Frame(1);
+  __ LoadConstant(0, Smi::Handle(Smi::New(-1)));
+  __ CheckClassId(0, __ AddConstant(Smi::Handle(Smi::New(kBoolCid))));
+  __ LoadConstant(0, Smi::Handle(Smi::New(42)));
+  __ Return(0);
+}
+
+
+ASSEMBLER_TEST_RUN(CheckClassIdFail, test) {
+  EXPECT_EQ(42, EXECUTE_TEST_CODE_INTPTR(test->code()));
+}
+
 }  // namespace dart
 
 #endif  // defined(TARGET_ARCH_DBC)