Subzero: Fix frame size for floating-point register out-args.

src/IceTargetLoweringX86BaseImpl.h

 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 7001 matching lines @@
 uint32_t TargetX86Base<TraitsType>::getCallStackArgumentsSizeBytes(
     const CfgVector<Type> &ArgTypes, Type ReturnType) {
   uint32_t OutArgumentsSizeBytes = 0;
   uint32_t XmmArgCount = 0;
   uint32_t GprArgCount = 0;
   for (Type Ty : ArgTypes) {
     // The PNaCl ABI requires the width of arguments to be at least 32 bits.
     assert(typeWidthInBytes(Ty) >= 4);
     if (isVectorType(Ty) && XmmArgCount < Traits::X86_MAX_XMM_ARGS) {
       ++XmmArgCount;
+    } else if (isScalarFloatingType(Ty) && Traits::X86_PASS_SCALAR_FP_IN_XMM &&
+               XmmArgCount < Traits::X86_MAX_XMM_ARGS) {
+      ++XmmArgCount;
     } else if (isScalarIntegerType(Ty) &&
                GprArgCount < Traits::X86_MAX_GPR_ARGS) {
       // The 64 bit ABI allows some integers to be passed in GPRs.
       ++GprArgCount;
     } else {
       if (isVectorType(Ty)) {
         OutArgumentsSizeBytes =
             Traits::applyStackAlignment(OutArgumentsSizeBytes);
       }
       OutArgumentsSizeBytes += typeWidthInBytesOnStack(Ty);
@@ skipping 934 matching lines @@
         emitGlobal(*Var, SectionSuffix);
       }
     }
   } break;
   }
 }
 } // end of namespace X86NAMESPACE
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H