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| 1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include <assert.h> // For assert | 5 #include <assert.h> // For assert |
| 6 #include <limits.h> // For LONG_MIN, LONG_MAX. | 6 #include <limits.h> // For LONG_MIN, LONG_MAX. |
| 7 | 7 |
| 8 #if V8_TARGET_ARCH_PPC | 8 #if V8_TARGET_ARCH_PPC |
| 9 | 9 |
| 10 #include "src/base/bits.h" | 10 #include "src/base/bits.h" |
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| 77 | 77 |
| 78 | 78 |
| 79 int MacroAssembler::CallSize(Register target) { return 2 * kInstrSize; } | 79 int MacroAssembler::CallSize(Register target) { return 2 * kInstrSize; } |
| 80 | 80 |
| 81 | 81 |
| 82 void MacroAssembler::Call(Register target) { | 82 void MacroAssembler::Call(Register target) { |
| 83 BlockTrampolinePoolScope block_trampoline_pool(this); | 83 BlockTrampolinePoolScope block_trampoline_pool(this); |
| 84 Label start; | 84 Label start; |
| 85 bind(&start); | 85 bind(&start); |
| 86 | 86 |
| 87 // Statement positions are expected to be recorded when the target | |
| 88 // address is loaded. | |
| 89 positions_recorder()->WriteRecordedPositions(); | |
| 90 | |
| 91 // branch via link register and set LK bit for return point | 87 // branch via link register and set LK bit for return point |
| 92 mtctr(target); | 88 mtctr(target); |
| 93 bctrl(); | 89 bctrl(); |
| 94 | 90 |
| 95 DCHECK_EQ(CallSize(target), SizeOfCodeGeneratedSince(&start)); | 91 DCHECK_EQ(CallSize(target), SizeOfCodeGeneratedSince(&start)); |
| 96 } | 92 } |
| 97 | 93 |
| 98 | 94 |
| 99 void MacroAssembler::CallJSEntry(Register target) { | 95 void MacroAssembler::CallJSEntry(Register target) { |
| 100 DCHECK(target.is(ip)); | 96 DCHECK(target.is(ip)); |
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| 121 BlockTrampolinePoolScope block_trampoline_pool(this); | 117 BlockTrampolinePoolScope block_trampoline_pool(this); |
| 122 DCHECK(cond == al); | 118 DCHECK(cond == al); |
| 123 | 119 |
| 124 #ifdef DEBUG | 120 #ifdef DEBUG |
| 125 // Check the expected size before generating code to ensure we assume the same | 121 // Check the expected size before generating code to ensure we assume the same |
| 126 // constant pool availability (e.g., whether constant pool is full or not). | 122 // constant pool availability (e.g., whether constant pool is full or not). |
| 127 int expected_size = CallSize(target, rmode, cond); | 123 int expected_size = CallSize(target, rmode, cond); |
| 128 Label start; | 124 Label start; |
| 129 bind(&start); | 125 bind(&start); |
| 130 #endif | 126 #endif |
| 131 | |
| 132 // Statement positions are expected to be recorded when the target | |
| 133 // address is loaded. | |
| 134 positions_recorder()->WriteRecordedPositions(); | |
| 135 | |
| 136 // This can likely be optimized to make use of bc() with 24bit relative | 127 // This can likely be optimized to make use of bc() with 24bit relative |
| 137 // | 128 // |
| 138 // RecordRelocInfo(x.rmode_, x.imm_); | 129 // RecordRelocInfo(x.rmode_, x.imm_); |
| 139 // bc( BA, .... offset, LKset); | 130 // bc( BA, .... offset, LKset); |
| 140 // | 131 // |
| 141 | 132 |
| 142 mov(ip, Operand(reinterpret_cast<intptr_t>(target), rmode)); | 133 mov(ip, Operand(reinterpret_cast<intptr_t>(target), rmode)); |
| 143 mtctr(ip); | 134 mtctr(ip); |
| 144 bctrl(); | 135 bctrl(); |
| 145 | 136 |
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| 4890 } | 4881 } |
| 4891 if (mag.shift > 0) srawi(result, result, mag.shift); | 4882 if (mag.shift > 0) srawi(result, result, mag.shift); |
| 4892 ExtractBit(r0, dividend, 31); | 4883 ExtractBit(r0, dividend, 31); |
| 4893 add(result, result, r0); | 4884 add(result, result, r0); |
| 4894 } | 4885 } |
| 4895 | 4886 |
| 4896 } // namespace internal | 4887 } // namespace internal |
| 4897 } // namespace v8 | 4888 } // namespace v8 |
| 4898 | 4889 |
| 4899 #endif // V8_TARGET_ARCH_PPC | 4890 #endif // V8_TARGET_ARCH_PPC |
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