OLD | NEW |
1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include <assert.h> // For assert | 5 #include <assert.h> // For assert |
6 #include <limits.h> // For LONG_MIN, LONG_MAX. | 6 #include <limits.h> // For LONG_MIN, LONG_MAX. |
7 | 7 |
8 #if V8_TARGET_ARCH_S390 | 8 #if V8_TARGET_ARCH_S390 |
9 | 9 |
10 #include "src/base/bits.h" | 10 #include "src/base/bits.h" |
(...skipping 5049 matching lines...) Loading... |
5060 if (use_RXform) { | 5060 if (use_RXform) { |
5061 l(dst, mem); | 5061 l(dst, mem); |
5062 } else if (use_RXYform) { | 5062 } else if (use_RXYform) { |
5063 ly(dst, mem); | 5063 ly(dst, mem); |
5064 } else { | 5064 } else { |
5065 ly(dst, MemOperand(base, scratch)); | 5065 ly(dst, MemOperand(base, scratch)); |
5066 } | 5066 } |
5067 #endif | 5067 #endif |
5068 } | 5068 } |
5069 | 5069 |
| 5070 void MacroAssembler::LoadLogicalHalfWordP(Register dst, const MemOperand& mem) { |
| 5071 #if V8_TARGET_ARCH_S390X |
| 5072 llgh(dst, mem); |
| 5073 #else |
| 5074 llh(dst, mem); |
| 5075 #endif |
| 5076 } |
| 5077 |
| 5078 void MacroAssembler::LoadLogicalHalfWordP(Register dst, Register src) { |
| 5079 #if V8_TARGET_ARCH_S390X |
| 5080 llghr(dst, src); |
| 5081 #else |
| 5082 llhr(dst, src); |
| 5083 #endif |
| 5084 } |
| 5085 |
5070 void MacroAssembler::LoadB(Register dst, const MemOperand& mem) { | 5086 void MacroAssembler::LoadB(Register dst, const MemOperand& mem) { |
5071 #if V8_TARGET_ARCH_S390X | 5087 #if V8_TARGET_ARCH_S390X |
5072 lgb(dst, mem); | 5088 lgb(dst, mem); |
5073 #else | 5089 #else |
5074 lb(dst, mem); | 5090 lb(dst, mem); |
5075 #endif | 5091 #endif |
5076 } | 5092 } |
5077 | 5093 |
5078 void MacroAssembler::LoadB(Register dst, Register src) { | 5094 void MacroAssembler::LoadB(Register dst, Register src) { |
5079 #if V8_TARGET_ARCH_S390X | 5095 #if V8_TARGET_ARCH_S390X |
5080 lgbr(dst, src); | 5096 lgbr(dst, src); |
5081 #else | 5097 #else |
5082 lbr(dst, src); | 5098 lbr(dst, src); |
5083 #endif | 5099 #endif |
5084 } | 5100 } |
5085 | 5101 |
5086 void MacroAssembler::LoadlB(Register dst, const MemOperand& mem) { | 5102 void MacroAssembler::LoadlB(Register dst, const MemOperand& mem) { |
5087 #if V8_TARGET_ARCH_S390X | 5103 #if V8_TARGET_ARCH_S390X |
5088 llgc(dst, mem); | 5104 llgc(dst, mem); |
5089 #else | 5105 #else |
5090 llc(dst, mem); | 5106 llc(dst, mem); |
5091 #endif | 5107 #endif |
5092 } | 5108 } |
5093 | 5109 |
| 5110 void MacroAssembler::LoadLogicalReversedWordP(Register dst, |
| 5111 const MemOperand& mem) { |
| 5112 lrv(dst, mem); |
| 5113 LoadlW(dst, dst); |
| 5114 } |
| 5115 |
| 5116 |
| 5117 void MacroAssembler::LoadLogicalReversedHalfWordP(Register dst, |
| 5118 const MemOperand& mem) { |
| 5119 lrvh(dst, mem); |
| 5120 LoadLogicalHalfWordP(dst, dst); |
| 5121 } |
| 5122 |
| 5123 |
5094 // Load And Test (Reg <- Reg) | 5124 // Load And Test (Reg <- Reg) |
5095 void MacroAssembler::LoadAndTest32(Register dst, Register src) { | 5125 void MacroAssembler::LoadAndTest32(Register dst, Register src) { |
5096 ltr(dst, src); | 5126 ltr(dst, src); |
5097 } | 5127 } |
5098 | 5128 |
5099 // Load And Test | 5129 // Load And Test |
5100 // (Register dst(ptr) = Register src (32 | 32->64)) | 5130 // (Register dst(ptr) = Register src (32 | 32->64)) |
5101 // src is treated as a 32-bit signed integer, which is sign extended to | 5131 // src is treated as a 32-bit signed integer, which is sign extended to |
5102 // 64-bit if necessary. | 5132 // 64-bit if necessary. |
5103 void MacroAssembler::LoadAndTestP_ExtendSrc(Register dst, Register src) { | 5133 void MacroAssembler::LoadAndTestP_ExtendSrc(Register dst, Register src) { |
(...skipping 418 matching lines...) Loading... |
5522 } | 5552 } |
5523 if (mag.shift > 0) ShiftRightArith(result, result, Operand(mag.shift)); | 5553 if (mag.shift > 0) ShiftRightArith(result, result, Operand(mag.shift)); |
5524 ExtractBit(r0, dividend, 31); | 5554 ExtractBit(r0, dividend, 31); |
5525 AddP(result, r0); | 5555 AddP(result, r0); |
5526 } | 5556 } |
5527 | 5557 |
5528 } // namespace internal | 5558 } // namespace internal |
5529 } // namespace v8 | 5559 } // namespace v8 |
5530 | 5560 |
5531 #endif // V8_TARGET_ARCH_S390 | 5561 #endif // V8_TARGET_ARCH_S390 |
OLD | NEW |