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| 1 /* ==================================================================== | |
| 2 * Copyright (c) 2011-2013 The OpenSSL Project. All rights reserved. | |
| 3 * | |
| 4 * Redistribution and use in source and binary forms, with or without | |
| 5 * modification, are permitted provided that the following conditions | |
| 6 * are met: | |
| 7 * | |
| 8 * 1. Redistributions of source code must retain the above copyright | |
| 9 * notice, this list of conditions and the following disclaimer. | |
| 10 * | |
| 11 * 2. Redistributions in binary form must reproduce the above copyright | |
| 12 * notice, this list of conditions and the following disclaimer in | |
| 13 * the documentation and/or other materials provided with the | |
| 14 * distribution. | |
| 15 * | |
| 16 * 3. All advertising materials mentioning features or use of this | |
| 17 * software must display the following acknowledgment: | |
| 18 * "This product includes software developed by the OpenSSL Project | |
| 19 * for use in the OpenSSL Toolkit. (http://www.OpenSSL.org/)" | |
| 20 * | |
| 21 * 4. The names "OpenSSL Toolkit" and "OpenSSL Project" must not be used to | |
| 22 * endorse or promote products derived from this software without | |
| 23 * prior written permission. For written permission, please contact | |
| 24 * licensing@OpenSSL.org. | |
| 25 * | |
| 26 * 5. Products derived from this software may not be called "OpenSSL" | |
| 27 * nor may "OpenSSL" appear in their names without prior written | |
| 28 * permission of the OpenSSL Project. | |
| 29 * | |
| 30 * 6. Redistributions of any form whatsoever must retain the following | |
| 31 * acknowledgment: | |
| 32 * "This product includes software developed by the OpenSSL Project | |
| 33 * for use in the OpenSSL Toolkit (http://www.OpenSSL.org/)" | |
| 34 * | |
| 35 * THIS SOFTWARE IS PROVIDED BY THE OpenSSL PROJECT ``AS IS'' AND ANY | |
| 36 * EXPRESSED OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
| 37 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR | |
| 38 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE OpenSSL PROJECT OR | |
| 39 * ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
| 40 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | |
| 41 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | |
| 42 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
| 43 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, | |
| 44 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | |
| 45 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED | |
| 46 * OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 47 * ==================================================================== | |
| 48 */ | |
| 49 | |
| 50 /* This implementation is by Ted Krovetz and was submitted to SUPERCOP and | |
| 51 * marked as public domain. It was been altered to allow for non-aligned inputs | |
| 52 * and to allow the block counter to be passed in specifically. */ | |
| 53 | |
| 54 #include <string.h> | |
| 55 #include <stdint.h> | |
| 56 #include <openssl/opensslconf.h> | |
| 57 | |
| 58 #if !defined(OPENSSL_NO_CHACHA) | |
| 59 | |
| 60 #include <openssl/chacha.h> | |
| 61 | |
| 62 #ifndef CHACHA_RNDS | |
| 63 #define CHACHA_RNDS 20 /* 8 (high speed), 20 (conservative), 12 (middle) */ | |
| 64 #endif | |
| 65 | |
| 66 /* Architecture-neutral way to specify 16-byte vector of ints */ | |
| 67 typedef unsigned vec __attribute__ ((vector_size (16))); | |
| 68 | |
| 69 /* This implementation is designed for Neon, SSE and AltiVec machines. The | |
| 70 * following specify how to do certain vector operations efficiently on | |
| 71 * each architecture, using intrinsics. | |
| 72 * This implementation supports parallel processing of multiple blocks, | |
| 73 * including potentially using general-purpose registers. | |
| 74 */ | |
| 75 #if __ARM_NEON__ | |
| 76 #include <arm_neon.h> | |
| 77 #define GPR_TOO 1 | |
| 78 #define VBPI 2 | |
| 79 #define ONE (vec)vsetq_lane_u32(1,vdupq_n_u32(0),0) | |
| 80 #define LOAD(m) (vec)(*((vec*)(m))) | |
| 81 #define STORE(m,r) (*((vec*)(m))) = (r) | |
| 82 #define ROTV1(x) (vec)vextq_u32((uint32x4_t)x,(uint32x4_t)x,1) | |
| 83 #define ROTV2(x) (vec)vextq_u32((uint32x4_t)x,(uint32x4_t)x,2) | |
| 84 #define ROTV3(x) (vec)vextq_u32((uint32x4_t)x,(uint32x4_t)x,3) | |
| 85 #define ROTW16(x) (vec)vrev32q_u16((uint16x8_t)x) | |
| 86 #if __clang__ | |
| 87 #define ROTW7(x) (x << ((vec){ 7, 7, 7, 7})) ^ (x >> ((vec){25,25,25,25})) | |
| 88 #define ROTW8(x) (x << ((vec){ 8, 8, 8, 8})) ^ (x >> ((vec){24,24,24,24})) | |
| 89 #define ROTW12(x) (x << ((vec){12,12,12,12})) ^ (x >> ((vec){20,20,20,20})) | |
| 90 #else | |
| 91 #define ROTW7(x) (vec)vsriq_n_u32(vshlq_n_u32((uint32x4_t)x,7),(uint32x4_t)x,25
) | |
| 92 #define ROTW8(x) (vec)vsriq_n_u32(vshlq_n_u32((uint32x4_t)x,8),(uint32x4_t)x,24
) | |
| 93 #define ROTW12(x) (vec)vsriq_n_u32(vshlq_n_u32((uint32x4_t)x,12),(uint32x4_t)x,2
0) | |
| 94 #endif | |
| 95 #elif __SSE2__ | |
| 96 #include <emmintrin.h> | |
| 97 #define GPR_TOO 0 | |
| 98 #if __clang__ | |
| 99 #define VBPI 4 | |
| 100 #else | |
| 101 #define VBPI 3 | |
| 102 #endif | |
| 103 #define ONE (vec)_mm_set_epi32(0,0,0,1) | |
| 104 #define LOAD(m) (vec)_mm_loadu_si128((__m128i*)(m)) | |
| 105 #define STORE(m,r) _mm_storeu_si128((__m128i*)(m), (__m128i) (r)) | |
| 106 #define ROTV1(x) (vec)_mm_shuffle_epi32((__m128i)x,_MM_SHUFFLE(0,3,2,1)) | |
| 107 #define ROTV2(x) (vec)_mm_shuffle_epi32((__m128i)x,_MM_SHUFFLE(1,0,3,2)) | |
| 108 #define ROTV3(x) (vec)_mm_shuffle_epi32((__m128i)x,_MM_SHUFFLE(2,1,0,3)) | |
| 109 #define ROTW7(x) (vec)(_mm_slli_epi32((__m128i)x, 7) ^ _mm_srli_epi32((__m128i)
x,25)) | |
| 110 #define ROTW12(x) (vec)(_mm_slli_epi32((__m128i)x,12) ^ _mm_srli_epi32((__m128i)
x,20)) | |
| 111 #if __SSSE3__ | |
| 112 #include <tmmintrin.h> | |
| 113 #define ROTW8(x) (vec)_mm_shuffle_epi8((__m128i)x,_mm_set_epi8(14,13,12,15,10,9
,8,11,6,5,4,7,2,1,0,3)) | |
| 114 #define ROTW16(x) (vec)_mm_shuffle_epi8((__m128i)x,_mm_set_epi8(13,12,15,14,9,8,
11,10,5,4,7,6,1,0,3,2)) | |
| 115 #else | |
| 116 #define ROTW8(x) (vec)(_mm_slli_epi32((__m128i)x, 8) ^ _mm_srli_epi32((__m128i)
x,24)) | |
| 117 #define ROTW16(x) (vec)(_mm_slli_epi32((__m128i)x,16) ^ _mm_srli_epi32((__m128i)
x,16)) | |
| 118 #endif | |
| 119 #else | |
| 120 #error -- Implementation supports only machines with neon or SSE2 | |
| 121 #endif | |
| 122 | |
| 123 #ifndef REVV_BE | |
| 124 #define REVV_BE(x) (x) | |
| 125 #endif | |
| 126 | |
| 127 #ifndef REVW_BE | |
| 128 #define REVW_BE(x) (x) | |
| 129 #endif | |
| 130 | |
| 131 #define BPI (VBPI + GPR_TOO) /* Blocks computed per loop iteration */ | |
| 132 | |
| 133 #define DQROUND_VECTORS(a,b,c,d) \ | |
| 134 a += b; d ^= a; d = ROTW16(d); \ | |
| 135 c += d; b ^= c; b = ROTW12(b); \ | |
| 136 a += b; d ^= a; d = ROTW8(d); \ | |
| 137 c += d; b ^= c; b = ROTW7(b); \ | |
| 138 b = ROTV1(b); c = ROTV2(c); d = ROTV3(d); \ | |
| 139 a += b; d ^= a; d = ROTW16(d); \ | |
| 140 c += d; b ^= c; b = ROTW12(b); \ | |
| 141 a += b; d ^= a; d = ROTW8(d); \ | |
| 142 c += d; b ^= c; b = ROTW7(b); \ | |
| 143 b = ROTV3(b); c = ROTV2(c); d = ROTV1(d); | |
| 144 | |
| 145 #define QROUND_WORDS(a,b,c,d) \ | |
| 146 a = a+b; d ^= a; d = d<<16 | d>>16; \ | |
| 147 c = c+d; b ^= c; b = b<<12 | b>>20; \ | |
| 148 a = a+b; d ^= a; d = d<< 8 | d>>24; \ | |
| 149 c = c+d; b ^= c; b = b<< 7 | b>>25; | |
| 150 | |
| 151 #define WRITE_XOR(in, op, d, v0, v1, v2, v3) \ | |
| 152 STORE(op + d + 0, LOAD(in + d + 0) ^ REVV_BE(v0)); \ | |
| 153 STORE(op + d + 4, LOAD(in + d + 4) ^ REVV_BE(v1)); \ | |
| 154 STORE(op + d + 8, LOAD(in + d + 8) ^ REVV_BE(v2)); \ | |
| 155 STORE(op + d +12, LOAD(in + d +12) ^ REVV_BE(v3)); | |
| 156 | |
| 157 #if __ARM_NEON__ | |
| 158 /* For ARM, we can't depend on NEON support, so this function is compiled with | |
| 159 * a different name, along with the generic code, and can be enabled at | |
| 160 * run-time. */ | |
| 161 void CRYPTO_chacha_20_neon( | |
| 162 #else | |
| 163 void CRYPTO_chacha_20( | |
| 164 #endif | |
| 165 unsigned char *out, | |
| 166 const unsigned char *in, | |
| 167 size_t inlen, | |
| 168 const unsigned char key[32], | |
| 169 const unsigned char nonce[8], | |
| 170 size_t counter) | |
| 171 { | |
| 172 unsigned iters, i, *op=(unsigned *)out, *ip=(unsigned *)in, *kp; | |
| 173 #if defined(__ARM_NEON__) | |
| 174 unsigned *np; | |
| 175 #endif | |
| 176 vec s0, s1, s2, s3; | |
| 177 #if !defined(__ARM_NEON__) && !defined(__SSE2__) | |
| 178 __attribute__ ((aligned (16))) unsigned key[8], nonce[4]; | |
| 179 #endif | |
| 180 __attribute__ ((aligned (16))) unsigned chacha_const[] = | |
| 181 {0x61707865,0x3320646E,0x79622D32,0x6B206574}; | |
| 182 #if defined(__ARM_NEON__) || defined(__SSE2__) | |
| 183 kp = (unsigned *)key; | |
| 184 #else | |
| 185 ((vec *)key)[0] = REVV_BE(((vec *)key)[0]); | |
| 186 ((vec *)key)[1] = REVV_BE(((vec *)key)[1]); | |
| 187 nonce[0] = REVW_BE(((unsigned *)nonce)[0]); | |
| 188 nonce[1] = REVW_BE(((unsigned *)nonce)[1]); | |
| 189 nonce[2] = REVW_BE(((unsigned *)nonce)[2]); | |
| 190 nonce[3] = REVW_BE(((unsigned *)nonce)[3]); | |
| 191 kp = (unsigned *)key; | |
| 192 np = (unsigned *)nonce; | |
| 193 #endif | |
| 194 #if defined(__ARM_NEON__) | |
| 195 np = (unsigned*) nonce; | |
| 196 #endif | |
| 197 s0 = LOAD(chacha_const); | |
| 198 s1 = LOAD(&((vec*)kp)[0]); | |
| 199 s2 = LOAD(&((vec*)kp)[1]); | |
| 200 s3 = (vec){ | |
| 201 counter & 0xffffffff, | |
| 202 #if __ARM_NEON__ | |
| 203 0, /* can't right-shift 32 bits on a 32-bit system. */ | |
| 204 #else | |
| 205 counter >> 32, | |
| 206 #endif | |
| 207 ((uint32_t*)nonce)[0], | |
| 208 ((uint32_t*)nonce)[1] | |
| 209 }; | |
| 210 | |
| 211 for (iters = 0; iters < inlen/(BPI*64); iters++) | |
| 212 { | |
| 213 #if GPR_TOO | |
| 214 register unsigned x0, x1, x2, x3, x4, x5, x6, x7, x8, | |
| 215 x9, x10, x11, x12, x13, x14, x15; | |
| 216 #endif | |
| 217 #if VBPI > 2 | |
| 218 vec v8,v9,v10,v11; | |
| 219 #endif | |
| 220 #if VBPI > 3 | |
| 221 vec v12,v13,v14,v15; | |
| 222 #endif | |
| 223 | |
| 224 vec v0,v1,v2,v3,v4,v5,v6,v7; | |
| 225 v4 = v0 = s0; v5 = v1 = s1; v6 = v2 = s2; v3 = s3; | |
| 226 v7 = v3 + ONE; | |
| 227 #if VBPI > 2 | |
| 228 v8 = v4; v9 = v5; v10 = v6; | |
| 229 v11 = v7 + ONE; | |
| 230 #endif | |
| 231 #if VBPI > 3 | |
| 232 v12 = v8; v13 = v9; v14 = v10; | |
| 233 v15 = v11 + ONE; | |
| 234 #endif | |
| 235 #if GPR_TOO | |
| 236 x0 = chacha_const[0]; x1 = chacha_const[1]; | |
| 237 x2 = chacha_const[2]; x3 = chacha_const[3]; | |
| 238 x4 = kp[0]; x5 = kp[1]; x6 = kp[2]; x7 = kp[3]; | |
| 239 x8 = kp[4]; x9 = kp[5]; x10 = kp[6]; x11 = kp[7]; | |
| 240 x12 = counter+BPI*iters+(BPI-1); x13 = 0; | |
| 241 x14 = np[0]; x15 = np[1]; | |
| 242 #endif | |
| 243 for (i = CHACHA_RNDS/2; i; i--) | |
| 244 { | |
| 245 DQROUND_VECTORS(v0,v1,v2,v3) | |
| 246 DQROUND_VECTORS(v4,v5,v6,v7) | |
| 247 #if VBPI > 2 | |
| 248 DQROUND_VECTORS(v8,v9,v10,v11) | |
| 249 #endif | |
| 250 #if VBPI > 3 | |
| 251 DQROUND_VECTORS(v12,v13,v14,v15) | |
| 252 #endif | |
| 253 #if GPR_TOO | |
| 254 QROUND_WORDS( x0, x4, x8,x12) | |
| 255 QROUND_WORDS( x1, x5, x9,x13) | |
| 256 QROUND_WORDS( x2, x6,x10,x14) | |
| 257 QROUND_WORDS( x3, x7,x11,x15) | |
| 258 QROUND_WORDS( x0, x5,x10,x15) | |
| 259 QROUND_WORDS( x1, x6,x11,x12) | |
| 260 QROUND_WORDS( x2, x7, x8,x13) | |
| 261 QROUND_WORDS( x3, x4, x9,x14) | |
| 262 #endif | |
| 263 } | |
| 264 | |
| 265 WRITE_XOR(ip, op, 0, v0+s0, v1+s1, v2+s2, v3+s3) | |
| 266 s3 += ONE; | |
| 267 WRITE_XOR(ip, op, 16, v4+s0, v5+s1, v6+s2, v7+s3) | |
| 268 s3 += ONE; | |
| 269 #if VBPI > 2 | |
| 270 WRITE_XOR(ip, op, 32, v8+s0, v9+s1, v10+s2, v11+s3) | |
| 271 s3 += ONE; | |
| 272 #endif | |
| 273 #if VBPI > 3 | |
| 274 WRITE_XOR(ip, op, 48, v12+s0, v13+s1, v14+s2, v15+s3) | |
| 275 s3 += ONE; | |
| 276 #endif | |
| 277 ip += VBPI*16; | |
| 278 op += VBPI*16; | |
| 279 #if GPR_TOO | |
| 280 op[0] = REVW_BE(REVW_BE(ip[0]) ^ (x0 + chacha_const[0])); | |
| 281 op[1] = REVW_BE(REVW_BE(ip[1]) ^ (x1 + chacha_const[1])); | |
| 282 op[2] = REVW_BE(REVW_BE(ip[2]) ^ (x2 + chacha_const[2])); | |
| 283 op[3] = REVW_BE(REVW_BE(ip[3]) ^ (x3 + chacha_const[3])); | |
| 284 op[4] = REVW_BE(REVW_BE(ip[4]) ^ (x4 + kp[0])); | |
| 285 op[5] = REVW_BE(REVW_BE(ip[5]) ^ (x5 + kp[1])); | |
| 286 op[6] = REVW_BE(REVW_BE(ip[6]) ^ (x6 + kp[2])); | |
| 287 op[7] = REVW_BE(REVW_BE(ip[7]) ^ (x7 + kp[3])); | |
| 288 op[8] = REVW_BE(REVW_BE(ip[8]) ^ (x8 + kp[4])); | |
| 289 op[9] = REVW_BE(REVW_BE(ip[9]) ^ (x9 + kp[5])); | |
| 290 op[10] = REVW_BE(REVW_BE(ip[10]) ^ (x10 + kp[6])); | |
| 291 op[11] = REVW_BE(REVW_BE(ip[11]) ^ (x11 + kp[7])); | |
| 292 op[12] = REVW_BE(REVW_BE(ip[12]) ^ (x12 + counter+BPI*iters+(BPI
-1))); | |
| 293 op[13] = REVW_BE(REVW_BE(ip[13]) ^ (x13)); | |
| 294 op[14] = REVW_BE(REVW_BE(ip[14]) ^ (x14 + np[0])); | |
| 295 op[15] = REVW_BE(REVW_BE(ip[15]) ^ (x15 + np[1])); | |
| 296 s3 += ONE; | |
| 297 ip += 16; | |
| 298 op += 16; | |
| 299 #endif | |
| 300 } | |
| 301 | |
| 302 for (iters = inlen%(BPI*64)/64; iters != 0; iters--) | |
| 303 { | |
| 304 vec v0 = s0, v1 = s1, v2 = s2, v3 = s3; | |
| 305 for (i = CHACHA_RNDS/2; i; i--) | |
| 306 { | |
| 307 DQROUND_VECTORS(v0,v1,v2,v3); | |
| 308 } | |
| 309 WRITE_XOR(ip, op, 0, v0+s0, v1+s1, v2+s2, v3+s3) | |
| 310 s3 += ONE; | |
| 311 ip += 16; | |
| 312 op += 16; | |
| 313 } | |
| 314 | |
| 315 inlen = inlen % 64; | |
| 316 if (inlen) | |
| 317 { | |
| 318 __attribute__ ((aligned (16))) vec buf[4]; | |
| 319 vec v0,v1,v2,v3; | |
| 320 v0 = s0; v1 = s1; v2 = s2; v3 = s3; | |
| 321 for (i = CHACHA_RNDS/2; i; i--) | |
| 322 { | |
| 323 DQROUND_VECTORS(v0,v1,v2,v3); | |
| 324 } | |
| 325 | |
| 326 if (inlen >= 16) | |
| 327 { | |
| 328 STORE(op + 0, LOAD(ip + 0) ^ REVV_BE(v0 + s0)); | |
| 329 if (inlen >= 32) | |
| 330 { | |
| 331 STORE(op + 4, LOAD(ip + 4) ^ REVV_BE(v1 + s1)); | |
| 332 if (inlen >= 48) | |
| 333 { | |
| 334 STORE(op + 8, LOAD(ip + 8) ^ | |
| 335 REVV_BE(v2 + s2)); | |
| 336 buf[3] = REVV_BE(v3 + s3); | |
| 337 } | |
| 338 else | |
| 339 buf[2] = REVV_BE(v2 + s2); | |
| 340 } | |
| 341 else | |
| 342 buf[1] = REVV_BE(v1 + s1); | |
| 343 } | |
| 344 else | |
| 345 buf[0] = REVV_BE(v0 + s0); | |
| 346 | |
| 347 for (i=inlen & ~15; i<inlen; i++) | |
| 348 ((char *)op)[i] = ((char *)ip)[i] ^ ((char *)buf)[i]; | |
| 349 } | |
| 350 } | |
| 351 | |
| 352 #endif /* !OPENSSL_NO_CHACHA */ | |
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Chromium Code Reviews
Issue 2072073002:
Delete bundled copy of OpenSSL and replace with README. (Closed)
Base URL: https://chromium.googlesource.com/chromium/deps/openssl@master