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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_XXX. | 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_XXX. |
| 6 | 6 |
| 7 #include "vm/flow_graph_compiler.h" | 7 #include "vm/flow_graph_compiler.h" |
| 8 | 8 |
| 9 #include "vm/cha.h" | 9 #include "vm/cha.h" |
| 10 #include "vm/dart_entry.h" | 10 #include "vm/dart_entry.h" |
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| 909 | 909 |
| 910 for (intptr_t i = 0; i < locs->temp_count(); i++) { | 910 for (intptr_t i = 0; i < locs->temp_count(); i++) { |
| 911 Location loc = locs->temp(i); | 911 Location loc = locs->temp(i); |
| 912 if (loc.IsRegister()) { | 912 if (loc.IsRegister()) { |
| 913 // Check that a register is not specified twice in the summary. | 913 // Check that a register is not specified twice in the summary. |
| 914 ASSERT(!blocked_registers[loc.reg()]); | 914 ASSERT(!blocked_registers[loc.reg()]); |
| 915 blocked_registers[loc.reg()] = true; | 915 blocked_registers[loc.reg()] = true; |
| 916 } | 916 } |
| 917 } | 917 } |
| 918 | 918 |
| 919 if (locs->out().IsRegister()) { | 919 if (locs->out(0).IsRegister()) { |
| 920 // Fixed output registers are allowed to overlap with | 920 // Fixed output registers are allowed to overlap with |
| 921 // temps and inputs. | 921 // temps and inputs. |
| 922 blocked_registers[locs->out().reg()] = true; | 922 blocked_registers[locs->out(0).reg()] = true; |
| 923 } | 923 } |
| 924 | 924 |
| 925 // Do not allocate known registers. | 925 // Do not allocate known registers. |
| 926 blocked_registers[CTX] = true; | 926 blocked_registers[CTX] = true; |
| 927 blocked_registers[SPREG] = true; | 927 blocked_registers[SPREG] = true; |
| 928 blocked_registers[FPREG] = true; | 928 blocked_registers[FPREG] = true; |
| 929 if (TMP != kNoRegister) { | 929 if (TMP != kNoRegister) { |
| 930 blocked_registers[TMP] = true; | 930 blocked_registers[TMP] = true; |
| 931 } | 931 } |
| 932 if (PP != kNoRegister) { | 932 if (PP != kNoRegister) { |
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| 969 for (intptr_t i = 0; i < locs->temp_count(); i++) { | 969 for (intptr_t i = 0; i < locs->temp_count(); i++) { |
| 970 Location loc = locs->temp(i); | 970 Location loc = locs->temp(i); |
| 971 if (loc.IsUnallocated()) { | 971 if (loc.IsUnallocated()) { |
| 972 ASSERT(loc.policy() == Location::kRequiresRegister); | 972 ASSERT(loc.policy() == Location::kRequiresRegister); |
| 973 loc = Location::RegisterLocation( | 973 loc = Location::RegisterLocation( |
| 974 AllocateFreeRegister(blocked_registers)); | 974 AllocateFreeRegister(blocked_registers)); |
| 975 locs->set_temp(i, loc); | 975 locs->set_temp(i, loc); |
| 976 } | 976 } |
| 977 } | 977 } |
| 978 | 978 |
| 979 Location result_location = locs->out(); | 979 Location result_location = locs->out(0); |
| 980 if (result_location.IsUnallocated()) { | 980 if (result_location.IsUnallocated()) { |
| 981 switch (result_location.policy()) { | 981 switch (result_location.policy()) { |
| 982 case Location::kAny: | 982 case Location::kAny: |
| 983 case Location::kPrefersRegister: | 983 case Location::kPrefersRegister: |
| 984 case Location::kRequiresRegister: | 984 case Location::kRequiresRegister: |
| 985 case Location::kWritableRegister: | 985 case Location::kWritableRegister: |
| 986 result_location = Location::RegisterLocation( | 986 result_location = Location::RegisterLocation( |
| 987 AllocateFreeRegister(blocked_registers)); | 987 AllocateFreeRegister(blocked_registers)); |
| 988 break; | 988 break; |
| 989 case Location::kSameAsFirstInput: | 989 case Location::kSameAsFirstInput: |
| 990 result_location = locs->in(0); | 990 result_location = locs->in(0); |
| 991 break; | 991 break; |
| 992 case Location::kRequiresFpuRegister: | 992 case Location::kRequiresFpuRegister: |
| 993 UNREACHABLE(); | 993 UNREACHABLE(); |
| 994 break; | 994 break; |
| 995 } | 995 } |
| 996 locs->set_out(result_location); | 996 locs->set_out(0, result_location); |
| 997 } | 997 } |
| 998 } | 998 } |
| 999 | 999 |
| 1000 | 1000 |
| 1001 ParallelMoveResolver::ParallelMoveResolver(FlowGraphCompiler* compiler) | 1001 ParallelMoveResolver::ParallelMoveResolver(FlowGraphCompiler* compiler) |
| 1002 : compiler_(compiler), moves_(32) {} | 1002 : compiler_(compiler), moves_(32) {} |
| 1003 | 1003 |
| 1004 | 1004 |
| 1005 void ParallelMoveResolver::EmitNativeCode(ParallelMoveInstr* parallel_move) { | 1005 void ParallelMoveResolver::EmitNativeCode(ParallelMoveInstr* parallel_move) { |
| 1006 ASSERT(moves_.is_empty()); | 1006 ASSERT(moves_.is_empty()); |
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| 1259 | 1259 |
| 1260 for (int i = 0; i < len; i++) { | 1260 for (int i = 0; i < len; i++) { |
| 1261 sorted->Add(CidTarget(ic_data.GetReceiverClassIdAt(i), | 1261 sorted->Add(CidTarget(ic_data.GetReceiverClassIdAt(i), |
| 1262 &Function::ZoneHandle(ic_data.GetTargetAt(i)), | 1262 &Function::ZoneHandle(ic_data.GetTargetAt(i)), |
| 1263 ic_data.GetCountAt(i))); | 1263 ic_data.GetCountAt(i))); |
| 1264 } | 1264 } |
| 1265 sorted->Sort(HighestCountFirst); | 1265 sorted->Sort(HighestCountFirst); |
| 1266 } | 1266 } |
| 1267 | 1267 |
| 1268 } // namespace dart | 1268 } // namespace dart |
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