Implement byte swapping instructions on MIPS32 and MIPS64.

test/cctest/test-disasm-mips.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 760 matching lines @@
       COMPARE(clz(a0, a1),
               "70a42020       clz     a0, a1");
       COMPARE(clz(s6, s7),
               "72f6b020       clz     s6, s7");
       COMPARE(clz(v0, v1),
               "70621020       clz     v0, v1");
     }
   }
 
   if (IsMipsArchVariant(kMips32r2) || IsMipsArchVariant(kMips32r6)) {
+    COMPARE(seb(a0, a1), "7c052420       seb     a0, a1");
+    COMPARE(seb(s6, s7), "7c17b420       seb     s6, s7");
+    COMPARE(seb(v0, v1), "7c031420       seb     v0, v1");
+
+    COMPARE(seh(a0, a1), "7c052620       seh     a0, a1");
+    COMPARE(seh(s6, s7), "7c17b620       seh     s6, s7");
+    COMPARE(seh(v0, v1), "7c031620       seh     v0, v1");
+
+    COMPARE(wsbh(a0, a1), "7c0520a0       wsbh    a0, a1");
+    COMPARE(wsbh(s6, s7), "7c17b0a0       wsbh    s6, s7");
+    COMPARE(wsbh(v0, v1), "7c0310a0       wsbh    v0, v1");
+  }
+
+  if (IsMipsArchVariant(kMips32r2) || IsMipsArchVariant(kMips32r6)) {
     COMPARE(ins_(a0, a1, 31, 1),
             "7ca4ffc4       ins     a0, a1, 31, 1");
     COMPARE(ins_(s6, s7, 30, 2),
             "7ef6ff84       ins     s6, s7, 30, 2");
     COMPARE(ins_(v0, v1, 0, 32),
             "7c62f804       ins     v0, v1, 0, 32");
     COMPARE(ext_(a0, a1, 31, 1),
             "7ca407c0       ext     a0, a1, 31, 1");
     COMPARE(ext_(s6, s7, 30, 2),
             "7ef60f80       ext     s6, s7, 30, 2");
@@ skipping 278 matching lines @@
 
 
 TEST(ctc1_cfc1_disasm) {
   SET_UP();
   COMPARE(abs_d(f10, f31), "4620fa85       abs.d   f10, f31");
   COMPARE(ceil_w_s(f8, f31), "4600fa0e       ceil.w.s f8, f31");
   COMPARE(ctc1(a0, FCSR), "44c4f800       ctc1    a0, FCSR");
   COMPARE(cfc1(a0, FCSR), "4444f800       cfc1    a0, FCSR");
   VERIFY_RUN();
 }