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Issue 2069933003: Implement byte swapping instructions on MIPS32 and MIPS64. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fix tests Created 4 years, 5 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 // A Disassembler object is used to disassemble a block of code instruction by 5 // A Disassembler object is used to disassemble a block of code instruction by
6 // instruction. The default implementation of the NameConverter object can be 6 // instruction. The default implementation of the NameConverter object can be
7 // overriden to modify register names or to do symbol lookup on addresses. 7 // overriden to modify register names or to do symbol lookup on addresses.
8 // 8 //
9 // The example below will disassemble a block of code and print it to stdout. 9 // The example below will disassemble a block of code and print it to stdout.
10 // 10 //
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1450 Format(instr, "dext 'rt, 'rs, 'sa, 'ss1"); 1450 Format(instr, "dext 'rt, 'rs, 'sa, 'ss1");
1451 break; 1451 break;
1452 } 1452 }
1453 case BSHFL: { 1453 case BSHFL: {
1454 int sa = instr->SaFieldRaw() >> kSaShift; 1454 int sa = instr->SaFieldRaw() >> kSaShift;
1455 switch (sa) { 1455 switch (sa) {
1456 case BITSWAP: { 1456 case BITSWAP: {
1457 Format(instr, "bitswap 'rd, 'rt"); 1457 Format(instr, "bitswap 'rd, 'rt");
1458 break; 1458 break;
1459 } 1459 }
1460 case SEB: 1460 case SEB: {
1461 case SEH: 1461 Format(instr, "seb 'rd, 'rt");
1462 case WSBH:
1463 UNREACHABLE();
1464 break; 1462 break;
1463 }
1464 case SEH: {
1465 Format(instr, "seh 'rd, 'rt");
1466 break;
1467 }
1468 case WSBH: {
1469 Format(instr, "wsbh 'rd, 'rt");
1470 break;
1471 }
1465 default: { 1472 default: {
1466 sa >>= kBp2Bits; 1473 sa >>= kBp2Bits;
1467 switch (sa) { 1474 switch (sa) {
1468 case ALIGN: { 1475 case ALIGN: {
1469 Format(instr, "align 'rd, 'rs, 'rt, 'bp2"); 1476 Format(instr, "align 'rd, 'rs, 'rt, 'bp2");
1470 break; 1477 break;
1471 } 1478 }
1472 default: 1479 default:
1473 UNREACHABLE(); 1480 UNREACHABLE();
1474 break; 1481 break;
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1485 switch (instr->SaFieldRaw() >> kSaShift) { 1492 switch (instr->SaFieldRaw() >> kSaShift) {
1486 case DBITSWAP_SA: 1493 case DBITSWAP_SA:
1487 Format(instr, "dbitswap 'rd, 'rt"); 1494 Format(instr, "dbitswap 'rd, 'rt");
1488 break; 1495 break;
1489 default: 1496 default:
1490 UNREACHABLE(); 1497 UNREACHABLE();
1491 break; 1498 break;
1492 } 1499 }
1493 break; 1500 break;
1494 } 1501 }
1495 case DSBH: 1502 case DSBH: {
1496 case DSHD: 1503 Format(instr, "dsbh 'rd, 'rt");
1497 UNREACHABLE();
1498 break; 1504 break;
1505 }
1506 case DSHD: {
1507 Format(instr, "dshd 'rd, 'rt");
1508 break;
1509 }
1499 default: { 1510 default: {
1500 sa >>= kBp3Bits; 1511 sa >>= kBp3Bits;
1501 switch (sa) { 1512 switch (sa) {
1502 case DALIGN: { 1513 case DALIGN: {
1503 Format(instr, "dalign 'rd, 'rs, 'rt, 'bp3"); 1514 Format(instr, "dalign 'rd, 'rs, 'rt, 'bp3");
1504 break; 1515 break;
1505 } 1516 }
1506 default: 1517 default:
1507 UNREACHABLE(); 1518 UNREACHABLE();
1508 break; 1519 break;
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2005 *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); 2016 *reinterpret_cast<int32_t*>(prev_pc), buffer.start());
2006 } 2017 }
2007 } 2018 }
2008 2019
2009 2020
2010 #undef UNSUPPORTED 2021 #undef UNSUPPORTED
2011 2022
2012 } // namespace disasm 2023 } // namespace disasm
2013 2024
2014 #endif // V8_TARGET_ARCH_MIPS64 2025 #endif // V8_TARGET_ARCH_MIPS64
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